On 26.05.2010 15:16, Arne Georg Gleditsch wrote:
Stefan Reinauer stefan.reinauer@coresystems.de writes:
That alone won't do it,.. There's the AMD specific MSR and %gs is not set to MMCONFIG_BASE on other chipsets/cpus. Not sure what to do about the MSR,... the %gs thing should probably fixed by setting up %gs in a central place somewhere.
If we move the MMCONF area into the 32-bit reachable range, we don't need to mess around with %gs. The other AMD specfic MSRs are localized to AMD specfic files, I believe.
IMHO we want that anyway to support 32bit operating systems.
Regards, Carl-Daniel