On 8/1/10 7:13 AM, austinro@msu.edu wrote:
Hi. The wiki page for seabios recommends configuring coreboot with CONFIG_VGA_BRIDGE_SETUP enabled and CONFIG_VGA_ROM_RUN disabled.
When building for the jetway j7f24 target, setting those two options in menuconfig results in the following error (after "make"):
CC cpu/intel/microcode/microcode.o AR coreboot.a CC coreboot_ram.o CC coreboot_ram
build/coreboot_ram.o: In function `vga_init': vga.c:(.text+0x1968): undefined reference to `mainboard_interrupt_handlers' collect2: ld returned 1 exit status make: *** [build/coreboot_ram] Error 1
With both options enabled make finishes. I don't know much about kconfig, so I haven't been able to figure out where the problem is.
Here is my .config
You also need to disable CONFIG_PCI_ROM_RUN.
The behavior here was slightly changed over time, so we probably should fix the documentation. We should also fix the code. Compilation errors are not so nice.
Stefan