Re: [coreboot] ADLO for buildrom

[Jordan Crouse]

On 30/04/08 11:21 -0600, Myles Watson wrote:
> On Wed, Apr 30, 2008 at 10:18 AM, Jordan Crouse  wrote:
> > On 30/04/08 10:16 -0600, Myles Watson wrote:
> > > > -----Original Message-----
> > > > From: Jordan Crouse [mailto:[e-mail]]
> > > > Sent: Wednesday, April 30, 2008 10:08 AM
> > > > To: Myles Watson
> > > > Cc: Coreboot
> > > > Subject: Re: ADLO for buildrom
> > > >
> > > > I don't know what the history of the ADLO code is - any reason why we
> > > > can't
> > > > give it a home in payloads/ on SVN instead of living in the buildrom
> > > > code?
> > >
> > > I don't think so.  The old code was in v2's tree under utils/
> > >
> > > I didn't think it was too big of a deal, since it's only one assembly file,
> > > a make file, and two elf headers.  I admit it looks like a lot with all the
> > > documentation.
> > >
> > > I'm happy to have it live wherever's best.  Who has to set that up?
> >
> > Its all set up - just push - I recommend payloads/adlo.
>
> Here are two patches.  One adds a lightened ADLO to payloads/adlo.
> The other adds ADLO to buildrom.
>
> The only non-specific change is an error if there is no payload
> selected, since it causes the build to fail.
>
> Signed-off-by: Myles Watson

Acked-by: Jordan Crouse  x 2
> Thanks,
> Myles
> Index: adlo/elf/elf-header-065kb.payload
>
> Cannot display: file marked as a binary type.
> svn:mime-type = application/octet-stream
>
> Property changes on: adlo/elf/elf-header-065kb.payload
> ___________________________________________________________________
> Name: svn:executable
>
> Name: svn:mime-type
> application/octet-stream
> Index: adlo/elf/elf-header-068kb.payload
>
> Cannot display: file marked as a binary type.
> svn:mime-type = application/octet-stream
>
> Property changes on: adlo/elf/elf-header-068kb.payload
> ___________________________________________________________________
> Name: svn:executable
>
> Name: svn:mime-type
> application/octet-stream
> Index: adlo/loader.s
>
> --- adlo/loader.s	(revision 0)
> +++ adlo/loader.s	(revision 0)
> @@ -0,0 +1,467 @@
> +;*****************************************************
> +; $Id: loader.s,v 1.1 2002/11/25 02:07:53 rminnich Exp $
> +;*****************************************************
> +USE32
> +; code it is loaded into memory at 0x7C00
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; A) setup GDT, so that we do not depend on program 
> +; that loaded us for GDT. 
> +; Ex: Coreboot and EtherBOOT use different GDT's.
>
> +;-----------------------------------------------------
> +; 0)
>
> +cli
>
> +;-----------------------------------------------------
> +; I)
>
> +lgdt [0x7C00+protected_gdt]
>
> +;-----------------------------------------------------
> +; II) setup CS
>
> +jmp 0x08:0x7C00+newpgdt
>
> +newpgdt: nop
>
> +;-----------------------------------------------------
> +; III) setup all other segments
>
> +mov ax,  #0x10
> +mov ss,  ax
> +mov ds,  ax
> +mov es,  ax
> +mov fs,  ax
> +mov gs,  ax
>
> +;-----------------------------------------------------
> +; IV)
>
> +; not now
> +;sti
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; B) shadow - ON (enable/read/write)
>
> +mov eax, #0x80000070
> +mov dx,  #0x0cf8
> +out dx,  eax
>
> +mov eax, #0xFFFFFFFF
> +mov dx,  #0x0cfc
> +out dx,  eax
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; C) copy -- boch bios
>
> +; counter - 64kb.     
> +mov ecx, #0x10000
>
> +; source - 0x8000  ( 0x7C00+0x400 = 0x8000 ) 
> +mov ax,  #0x10        ; src-segment - 2nd entry in GDT
> +mov ds,  ax
> +mov eax, #0x8000      ; src-offset  - 0x8000
> +mov esi, eax
>
> +; destination - 0xF0000
> +mov ax,  #0x10        ; dst-segment - 2nd entry in GDT
> +mov es,  ax     
> +mov eax, #0xF0000     ; dst-offset  - 0xF0000
> +mov edi, eax
>
> +; clear direction flag
> +cld
>
> +; the copy
> +rep
> movsb
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; X) copy -- Coreboot table into safe place.
> ;; TODO.
> ;; Q1 :	 what is the size of table.
> ;; Q2 :	 where to copy?
>
> +;*****************************************************
> +nop
> +nop	
> +;*****************************************************
> +; E) shadow - OFF (write)
>
> +mov eax, #0x80000070
> +mov dx,  #0x0cf8
> +out dx,  eax
>
> +;mov eax, #0xFFFFFFFF
> +mov eax, #0x0000FFFF
> +mov dx,  #0x0cfc
> +out dx,  eax
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; F) do a little prep work.
>
> +;-----------------------------------------------------
> +; I) disable cache
>
> +; if you disable cache, GRUB's GFX mode will be VERY slow.
> +; so DO NOT DISABLE
>
> +;mov eax, cr0
> +;or  eax, #0x60000000
> +;wbinvd
> +;mov cr0, eax
> +;wbinvd
>
> +;-----------------------------------------------------
> +; II) disable MTRR
> +; clear the "E" (0x800) and "FE" (0x400) flags in 
> +; IA32_MTRRdefType register (0x2FF)
>
> +;-----------------------
>
> +;mov ECX,#0x2FF
>
> +; select either of the two below 
> +; depending on if your compiler suports 
> +; {RD,WR}MSR or not
> +;rdmsr
> +; .byte 0x0F, 0x32
>
> +;xor edx, edx
> +; xor eax, eax
> +;and eax, #0xFFFFF3FF
>
> +; select either of the two below 
> +; depending on if your compiler suports 
> +; {RD,WR}MSR or not
> +;wrmsr
> +; .byte 0x0F, 0x30
>
> +;-----------------------
> +;; This is what PC BIOS is setting. -- P6STMT.
> +; add VIDEO BIOS cacheable!!!!
> +;-----------------------
> +; Fixed Range C0--C8
> +;mov ECX,#0x268
> +;mov EDX,#0x05050505 
> +;mov EAX,#0x05050505 
> +;wrmsr
> +;-----------------------
> +; Fixed Range C8--CF
> +;mov ECX,#0x269
> +;mov EDX,#0x0 
> +;mov EAX,#0x05050505 
> +;wrmsr
> +;-----------------------
>
> +;-----------------------------------------------------
> +; III) tell BOCHS' BIOS we want to boot from hdd.
> +; 0x00 - floppy
> +; 0x02 - hdd
> +; It's changed now //With El Torito enabled
> +; 0x0 - none
> +; 0x1 - floppy
> +; 0x2 - hdd
> +; 0x3 - cdrom
> +; i.e., 0x23 means try the cdrom first, then the hdd
> +; In future there will be 'fd failover'option in bochs.
>
> +mov  al, #0x3d ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x23 ;; val (cd then hdd)
> +out  0x71, al
>
> +;-----------------------------------------------------
> +; IV) tell BOCHS' BIOS length of our mem block @ 1mb.
> +;     This is for Int 15 / EAX=E820
> +;     119mb = 0x77 00 00 00 
> +;     (this is for 128mb of ram)
> +;     (FIXME: this value is currently hard coded)
> +;     (it should be being passed from coreboot )
>
> +; for WinFast  6300
> +; 07 70 = 0770
> +; 06 80 = 0770 - 00F0		<< ALT (for unpatched bochs)
>
> +; for P6STMT - 10kb less ram
> +; 077F - 10     = 07 6F 
> +; 07 6F - 00 F0 = 06 7F
>
> +mov  al, #0x35 ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x06 ;; val 
> +out  0x71, al
>
> +mov  al, #0x34 ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x7F ;; val 
> +out  0x71, al
>
> +mov  al, #0x31 ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x00 ;; val 
> +out  0x71, al
>
> +mov  al, #0x30 ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x00 ;; val 
> +out  0x71, al
>
> +;-----------------------------------------------------
> +; V) tell BOCHS' BIOS we want to have LBA translation.
> +; 0x00 - NONE
> +; 0x01 - LBA    <<<<
> +; 0x02 - LARGE
> +; 0x03 - R-CHS
> +; In future there will be 'fd failover'option in bochs.
>
> +mov  al, #0x39 ;; cmos_reg
> +out  0x70, al
> +mov  al, #0x05 ;; val 5 = (LBA and LBA) 0 = none
> +out  0x71, al
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; G) the switch -- protected to real mode
>
> +; IASDM, Vol 3
> +; (8-14) 8.8.2 Switching Back to Real-Address Mode
>
> +;=====================================================
> +; 1) disable interrupts
>
> +cli
>
> +;=====================================================
> +nop
> +;=====================================================
> +; 2) paging
>
> +;not enabled, so not applicable.
>
> +;=====================================================
> +; 3) setup CS segment limit (64kb)
> +; I)
>
> +lgdt [0x7C00+new_gdt]
>
> +;-----------------------------------------------------
> +; II)
>
> +jmp 0x08:0x7C00+new64lim
>
> +new64lim: nop
>
> +;=====================================================
> +nop
> +;=====================================================
> +; 4) setup all other segments
>
> +mov ax,  #0x10
> +mov ss,  ax
> +mov ds,  ax
> +mov es,  ax
> +mov fs,  ax
> +mov gs,  ax
>
> +;=====================================================
> +nop
> +;=====================================================
> +; 5) LIDT
> +; I)
>
> +; set up Real Mode IDT table (0...3FF)
>
> +; for BOCH's BIOS the address 0xF000:0xFF53 
> +; cantains value 0xCF which is IRET opcode.
>
> +; counter 
> +mov cx,  #0xFF ;1024 bytes(255 interrupts)(4*255=0x3FF)
>
> +; destination - 0x00000 = ES:EDI
> +mov ax,  #0x10        ; dst-segment - 2nd entry in GDT
> +mov es,  ax
> +mov eax, #0x00000     ; dst-offset  - 0x00000
> +mov edi, eax
>
> +; data to store -- 0xF000:FF53
> +mov eax, #0xF000FF53
>
> +; clear direction flag
> +cld
>
> +; the store 
> +rep
> stosd
>
> +;-----------------------------------------------------
> +; II)
> +; load interrupt descriptor table
>
> +lidt [0x7C00+new_idt]
>
> +;=====================================================
> +nop
> +nop
> +;=====================================================
> +; 6) clear the PE flag in CR0 register.
> +; I)
>
> +; switch to 16 bit segments
> +mov ax,  #0x20
> +mov ss,  ax
> +mov ds,  ax
> +mov es,  ax
> +mov fs,  ax
> +mov gs,  ax
>
> +;-----------------------------------------------------
> +; II)
>
> +; switch to 16 bit CS
>
> +jmp 0x018:0x7C00+new16bit
>
> +USE16
>
> +new16bit: nop
>
> +;-----------------------------------------------------
> +; III)
> +; the switch
>
> +;xor eax, eax
>
> +mov eax, cr0            
> +and eax, #0xFFFFFFFE
> +mov cr0, eax            ;switch to RM
>
> +;=====================================================
> +nop
> +nop
> +;=====================================================
> +; 7) far jump -- (to real mode address)
>
> +jmp 0x0:0x7C00+realcs
>
> +realcs: nop
>
> +;=====================================================
> +; 8) set all segment registers to 0's
>
> +mov ax,  #0x0
> +mov ss,  ax
> +mov ds,  ax
> +mov es,  ax
> +mov fs,  ax
> +mov gs,  ax
>
> +;=====================================================
> +; 9) re-enable interrupts
>
> +sti
>
> +;*****************************************************
> +nop
> +nop
> +;*****************************************************
> +; H) jump to BIOS.
>
> +jmp 0xFFFF:0x0000
> +;jmp 0xF000:0xFFF0
>
> +;*****************************************************
> +;*****************************************************
> +nop
> +nop
> +nop
> +nop
> +;*****************************************************
> +;*****************************************************
>
> +USE32
>
> +new_idt:
> +dw 0x03ff ;; limit 15:00
> +dw 0x0000 ;; base  15:00
> +dw 0x0000 ;; base  23:16
>
> +new_gdt:
> +dw 0x0028                     ;; limit 15:00
> +dw 0x7C00+new_gdt_table       ;; base  15:00
> +dw 0x0000                     ;; base  23:16
>
> +protected_gdt:
> +dw 0x0018                     ;; limit 15:00
> +dw 0x7C00+pmode_gdt_table     ;; base  15:00
> +dw 0x0000                     ;; base  23:16
>
> +;-----------------------------------------------------
>
> +new_gdt_table:
> +;//  1 2 3 4 
> +;//0
> +dd 0x00000000
> +dd 0x00000000
>
> +;//8
> +dd 0x0000ffff
> +dd 0x00409E00
>
> +;//10
> +dd 0x0000ffff
> +dd 0x00409200
>
> +;//18
> +dd 0x0000ffff
> +dd 0x00009a00
>
> +;//20
> +dd 0x0000ffff
> +dd 0x00009200
>
> +;-------------------------
>
> +pmode_gdt_table:
> +;//  1 2 3 4 
> +;//0
> +dd 0x00000000
> +dd 0x00000000
>
> +;//8
> +dd 0x0000ffff
> +dd 0x00CF9E00
>
> +;//10
> +dd 0x0000ffff
> +dd 0x00CF9200
>
> +;*****************************************************
> +;*****************************************************
> +; the file size must be 1024 bytes.
>
> +.org 0x400-1
> +; dd 0xdeadbeef			
> +db 0x0
>
> +;*****************************************************
> Index: adlo/align.patch
> ===================================================================
> --- adlo/align.patch	(revision 0)
> +++ adlo/align.patch	(revision 0)
> @@ -0,0 +1,105 @@
> +--- loader.s	2008-02-13 12:12:04.000000000 -0700
> ++++ loader_4K.s	2008-04-11 15:57:01.000000000 -0600
> +@@ -2,7 +2,7 @@
> ; $Id: loader.s,v 1.1 2002/11/25 02:07:53 rminnich Exp $
> ;*****************************************************
> USE32
>
> +-; code it is loaded into memory at 0x7C00
> ++; code it is loaded into memory at 0x7000
> ;*****************************************************
> nop
> nop
>
> +@@ -19,12 +19,12 @@
> ;-----------------------------------------------------
> ; I)
>
> +-lgdt [0x7C00+protected_gdt]
> ++lgdt [0x7000+protected_gdt]
> ;-----------------------------------------------------
> ; II) setup CS
>
> +-jmp 0x08:0x7C00+newpgdt
> ++jmp 0x08:0x7000+newpgdt
> newpgdt: nop
>
> +@@ -67,7 +67,7 @@
> ; counter - 64kb.
> mov ecx, #0x10000
>
> +-; source - 0x8000  ( 0x7C00+0x400 = 0x8000 ) 
> ++; source - 0x8000  ( 0x7000+0x1000 = 0x8000 )
> mov ax,  #0x10        ; src-segment - 2nd entry in GDT
> mov ds,  ax
> mov eax, #0x8000      ; src-offset  - 0x8000
>
> +@@ -262,12 +262,12 @@
> ; 3) setup CS segment limit (64kb)
> ; I)
>
> +-lgdt [0x7C00+new_gdt]
> ++lgdt [0x7000+new_gdt]
> ;-----------------------------------------------------
> ; II)
>
> +-jmp 0x08:0x7C00+new64lim
> ++jmp 0x08:0x7000+new64lim
> new64lim: nop
>
> +@@ -317,7 +317,7 @@
> ; II)
> ; load interrupt descriptor table
>
> +-lidt [0x7C00+new_idt]
> ++lidt [0x7000+new_idt]
> ;=====================================================
> nop
>
> +@@ -339,7 +339,7 @@
> ; switch to 16 bit CS
>
> +-jmp 0x018:0x7C00+new16bit
> ++jmp 0x018:0x7000+new16bit
> USE16
>
> +@@ -361,7 +361,7 @@
> ;=====================================================
> ; 7) far jump -- (to real mode address)
>
> +-jmp 0x0:0x7C00+realcs
> ++jmp 0x0:0x7000+realcs
> realcs: nop
>
> +@@ -407,12 +407,12 @@
> new_gdt:
> dw 0x0028                     ;; limit 15:00
>
> +-dw 0x7C00+new_gdt_table       ;; base  15:00
> ++dw 0x7000+new_gdt_table       ;; base  15:00
> dw 0x0000                     ;; base  23:16
> protected_gdt:
> dw 0x0018                     ;; limit 15:00
>
> +-dw 0x7C00+pmode_gdt_table     ;; base  15:00
> ++dw 0x7000+pmode_gdt_table     ;; base  15:00
> dw 0x0000                     ;; base  23:16
> ;-----------------------------------------------------
>
> +@@ -457,10 +457,10 @@
> ;*****************************************************
> ;*****************************************************
>
> +-; the file size must be 1024 bytes.
> ++; the file size must be 4096 bytes.
>
> +-.org 0x400-1
> ++.org 0x1000-1
> ; dd 0xdeadbeef
> db 0x0
> Index: adlo/README
>
> --- adlo/README	(revision 0)
> +++ adlo/README	(revision 0)
> @@ -0,0 +1,145 @@
> +This README is based on the ADLO README from coreboot-v2/utils/ADLO/
> +You can refer there for other documentation (from 2002) as well.
>
> +ADLO
> A project to combine coreboot and BOCHS BIOS to add support
> for booting legacy applications, such as Microsoft Windows.
>
> +==========================================
>
> +Boot Overvew:
> ADLO requires an boot loader with ELF support.
> In our case it is either coreboot or EtherBOOT.
> Sample execution paths:
>
> +coreboot -> ADLO -> LILO -> LINUX
>
> +coreboot -> EtherBOOT -> ADLO -> LILO -> LINUX
> Then it can start any real mode application.
> In our case it could be LILO or GRUB, but
> choices are not limited to this.
>
> +==========================================
>
> +ADLO overview:
> -Elf header
> -mainteance routines
> -bochs bios
> -vga bios
>
> +------------------------------------------
>
> +Elf header
> hand crafted binary. Currently there are 2 different binaries
> for alignment reasons (kexec needs page alignment).
> they are catted at beginning of file
>
> +------------------------------------------
>
> +maintenance routines
> this is the loader.s file which gets compiled into loader.o binary
> it is catted 2nd right after elf header and it is where
> control is being transfered when the elf is executed.
> it consist of :
> -tuneups:
> 	select device to boot
> 	set memory for Int15/EAX=E820
> 	enable LBA
> 	copy coreboot table [TODO]
> -shadow : 
> 	enable/write/read
> -copy:
> 	bochs @ 0xF00000
> 	video bios (binary only) @ 0xC00000
> -switch
> 	from Real to Protected Mode
> -jump 
> 	jmp to the bios at 0xFFFF:0x0000
> we must have bios payload always at 1kB or 4kB
> offset from start of ELF payload so loader.o
> must be always 1024 or 4096 bytes.
>
> +------------------------------------------
>
> +BOCHS BIOS
> We have taken the Boch's project and just extracted
> its BIOS from it only. Kevin O'Connor ported it to gcc.
>
> +------------------------------------------
>
> +Video BIOS
> Video BIOS needs to be added to Coreboot. See build instructions there.
>
> +==========================================
>
> +Environment overview
>
> +ADLO is an ELF file and thus can be loaded either directly from 1)
> +coreboot, or 2) via EtherBOOT, 3) via EtherBOOT+ AA patch for FS
> +support, or 4) via kexec from a Linux kernel.
>
> +1)
> +Both coreboot and ADLO are on the same EEPROM chip. From end-user 
> +viewpoint it is probably the most similar to the bios classic.
> +(computer boots up and just loads whatever is in MBR).
>
> +2)
> +Set it up in /tftpboot directory on dhcp/tftp server and have it served
> +from there. (this is how we did the development)
>
> +3)
> +Use AA patch and put it as /kernel file and it will be then loaded by
> +etherboot from local hard disk.
>
> +3)
> +Put Coreboot + kernel in same BIOS image, put adlo.elf in an accessible
> +filesystem (either in the initrd-rootfs or on local storage.)
>
> +------------------------------------------
>
> +Before ADLO starts.
> ADLO requires an boot loader with ELF support.
> In our case it is:
> -coreboot
> -coreboot and EtherBOOT
> -coreboot and EtherBOOT + AA polled I/O patch (w/ FS support).
> As little as coreboot only is required to get ADLO
> up and running.
> For development purposes it is recommended full set of
> coreboot + EtherBOOT and boot via DHCP/TFTP.
>
> +------------------------------------------
>
> +After ADLO finish.
> ADLO will attempt to boot from the CD-ROM, then if that fails
> locate the first hard disk and read MBR from it and execute.
> Then it can start any real mode application.
> In our case it could be LILO or GRUB
> but choices are not limited to this.
> In our case it would cause LILO to load
> (fully usable) and from there it was able to
> execute simple programs. so far the list
> of the program is limited to linux which
> runs somewhat. More to come in future.
>
> +==========================================
> Index: adlo/Makefile
> ===================================================================
> --- adlo/Makefile	(revision 0)
> +++ adlo/Makefile	(revision 0)
> @@ -0,0 +1,42 @@
> +#-------------------------------------------------
> +# $Id: Makefile,v 1.2 2003/05/22 12:52:38 aip Exp $
> +#-------------------------------------------------
>
> +ELF065=elf/elf-header-065kb.payload
> +ELF068=elf/elf-header-068kb.payload
>
> +LOADER=loader
> +LOADER_4K=loader_4K
>
> +LOADERS= ${LOADER_4K}.o ${LOADER}.o
>
> +BOCHS_PATH=legacybios
>
> +BIOS=${BOCHS_PATH}/rom.bin
>
> +PAYLOAD=adlo.elf
> +PAYLOAD_KEXEC=adlo.aligned.elf
>
> +#-------------------------------------------------
>
> +all: ${LOADERS} ${BIOS}
> cat ${ELF065} ${LOADER}.o ${BIOS} > ${PAYLOAD}
> cat ${ELF068} ${LOADER_4K}.o ${BIOS} > ${PAYLOAD_KEXEC}
>
> +#-------------------------------------------------
>
> +${LOADER}.o: ${LOADER}.s
> as86 $< -b $@
>
> +${LOADER_4K}.s: ${LOADER}.s
> patch $< -o $@ < align.patch
>
> +${LOADER_4K}.o: ${LOADER_4K}.s
> as86 $< -b $@
>
> +#-------------------------------------------------
>
> +clean:
> rm -rf *.o ${PAYLOAD} ${PAYLOAD_KEXEC}
> rm -rf ${LOADER_4K}.s
> Index: packages/adlo/adlo.mk
>
> --- packages/adlo/adlo.mk	(revision 0)
> +++ packages/adlo/adlo.mk	(revision 0)
> @@ -0,0 +1,65 @@
> +ADLO_URL=svn://coreboot.org/repos/trunk/payloads/adlo
> +ADLO_TAG=3276
>
> +ADLO_DIR=$(BUILD_DIR)/svn
> +ADLO_SRC_DIR=$(ADLO_DIR)/svn
> +ADLO_STAMP_DIR=$(ADLO_DIR)/stamps
> +ADLO_LOG_DIR=$(ADLO_DIR)/logs
>
> +ifeq ($(CONFIG_VERBOSE),y)
> +ADLO_FETCH_LOG=/dev/stdout
> +ADLO_BUILD_LOG=/dev/stdout
> +else
> +ADLO_BUILD_LOG=$(ADLO_LOG_DIR)/build.log
> +ADLO_FETCH_LOG=$(ADLO_LOG_DIR)/fetch.log
> +endif
>
> +# Make sure we have the tools we need to accomplish this
> +HAVE_AS86:=$(call find-tool,as86)
>
> +ifeq ($(HAVE_AS86),n)
> +$(error To build ADLO, you need to install as86, available in dev86)
> +endif
>
> +ADLO_CONFIG=$(PACKAGE_DIR)/adlo/conf/defconfig
>
> +ADLO_TARBALL=adlo-svn-$(ADLO_TAG).tar.gz
>
> +$(SOURCE_DIR)/$(ADLO_TARBALL): | $(ADLO_LOG_DIR)
> @ mkdir -p $(SOURCE_DIR)/adlo
> @ $(BIN_DIR)/fetchsvn.sh $(ADLO_URL) $(SOURCE_DIR)/adlo \
> $(ADLO_TAG) $(SOURCE_DIR)/$(ADLO_TARBALL) \
> > $(ADLO_FETCH_LOG) 2>&1
>
> +$(ADLO_STAMP_DIR)/.unpacked: $(SOURCE_DIR)/$(ADLO_TARBALL) | $(ADLO_STAMP_DIR) $(ADLO_LOG_DIR) $(ADLO_DIR)
> @ echo "Unpacking adlo..."
> @ tar -C $(ADLO_DIR) -zxf $(SOURCE_DIR)/$(ADLO_TARBALL)
> @ ln -s $(LEGACYBIOS_SRC_DIR)/out/ $(ADLO_DIR)/svn/legacybios
> @ touch $@
>
> +$(ADLO_SRC_DIR)/adlo.elf: $(ADLO_STAMP_DIR)/.unpacked $(LEGACYBIOS_SRC_DIR)/out/rom.bin
> @ echo "Building adlo..."
> @ make -C $(ADLO_SRC_DIR) > $(ADLO_BUILD_LOG) 2>&1
>
> +$(ADLO_STAMP_DIR)/.copied: $(ADLO_SRC_DIR)/adlo.elf
> @ mkdir -p $(shell dirname $(PAYLOAD_ELF))
> @ cp $(ADLO_SRC_DIR)/adlo.elf $(PAYLOAD_ELF)
> @ touch $@
>
> +$(ADLO_STAMP_DIR) $(ADLO_LOG_DIR):
> @ mkdir -p $@
>
> +adlo: $(ADLO_STAMP_DIR)/.copied
>
> +adlo-clean:
> @ echo "Cleaning adlo..."
> @ rm -f $(ADLO_STAMP_DIR)/.copied
>
> +ifneq ($(wildcard $(ADLO_SRC_DIR)/Makefile),)
> @ $(MAKE) -C $(ADLO_SRC_DIR) clean > /dev/null 2>&1
>
> +endif
>
> +adlo-distclean:
> @ rm -rf $(ADLO_DIR)/*
> Index: packages/legacybios/legacybios.mk
>
> --- packages/legacybios/legacybios.mk	(revision 0)
> +++ packages/legacybios/legacybios.mk	(revision 0)
> @@ -0,0 +1,56 @@
> +LEGACYBIOS_URL=http://linuxtogo.org/~kevin/legacybios/
> +LEGACYBIOS_TAG=0.2.0
>
> +LEGACYBIOS_DIR=$(BUILD_DIR)/legacybios
> +LEGACYBIOS_SRC_DIR=$(LEGACYBIOS_DIR)/legacybios-$(LEGACYBIOS_TAG)
> +LEGACYBIOS_STAMP_DIR=$(LEGACYBIOS_DIR)/stamps
> +LEGACYBIOS_LOG_DIR=$(LEGACYBIOS_DIR)/logs
>
> +LEGACYBIOS_PATCHES=
>
> +ifeq ($(CONFIG_VERBOSE),y)
> +LEGACYBIOS_FETCH_LOG=/dev/stdout
> +LEGACYBIOS_BUILD_LOG=/dev/stdout
> +LEGACYBIOS_INSTALL_LOG=/dev/stdout
> +else
> +LEGACYBIOS_BUILD_LOG=$(LEGACYBIOS_LOG_DIR)/build.log
> +LEGACYBIOS_INSTALL_LOG=$(LEGACYBIOS_LOG_DIR)/install.log
> +LEGACYBIOS_FETCH_LOG=$(LEGACYBIOS_LOG_DIR)/fetch.log
> +endif
>
> +LEGACYBIOS_TARBALL=legacybios-$(LEGACYBIOS_TAG).tar.gz
> +LEGACYBIOS_SOURCE=legacybios-$(LEGACYBIOS_TAG).tar.gz
>
> +ifeq ($(shell if [ -f $(PACKAGE_DIR)/legacybios/conf/customconfig--$(PAYLOAD)--$(COREBOOT_VENDOR)-$(COREBOOT_BOARD) ]; then echo 1; fi),1)
> LEGACYBIOS_CONFIG = customconfig--$(PAYLOAD)--$(COREBOOT_VENDOR)-$(COREBOOT_BOARD)
>
> +endif
>
> +$(SOURCE_DIR)/$(LEGACYBIOS_TARBALL):
> @ mkdir -p $(SOURCE_DIR)
> @ wget $(WGET_Q) -P $(SOURCE_DIR) $(LEGACYBIOS_URL)/$(LEGACYBIOS_SOURCE) --output-document=$(SOURCE_DIR)/$(LEGACYBIOS_TARBALL)
>
> +$(LEGACYBIOS_STAMP_DIR)/.unpacked: $(SOURCE_DIR)/$(LEGACYBIOS_TARBALL) | $(LEGACYBIOS_STAMP_DIR) $(LEGACYBIOS_DIR) $(LEGACYBIOS_LOG_DIR)
> @ echo "Unpacking legacybios..."
> @ tar -C $(LEGACYBIOS_DIR) -zxf $(SOURCE_DIR)/$(LEGACYBIOS_TARBALL)
> @ touch $@
>
> +$(LEGACYBIOS_SRC_DIR)/out/rom.bin: $(LEGACYBIOS_STAMP_DIR)/.unpacked
> @ echo "Building legacybios..."
> @ echo $(LEGACYBIOS_SRC_DIR)
> @ make -C $(LEGACYBIOS_SRC_DIR) > $(LEGACYBIOS_BUILD_LOG) 2>&1
>
> +$(LEGACYBIOS_STAMP_DIR) $(LEGACYBIOS_LOG_DIR):
> @ mkdir -p $@
>
> +legacybios: $(LEGACYBIOS_SRC_DIR)/out/rom.bin
>
> +legacybios-clean:
> @ echo "Cleaning legacybios..."
> @ rm -f $(LEGACYBIOS_STAMP_DIR)/.copied
>
> +ifneq ($(wildcard $(LEGACYBIOS_SRC_DIR)/Makefile),)
> @ $(MAKE) -C $(LEGACYBIOS_SRC_DIR) clean > /dev/null 2>&1
>
> +endif
>
> +legacybios-distclean:
> @ rm -rf $(LEGACYBIOS_DIR)/*
> Index: config/payloads/payloads.conf
>
> --- config/payloads/payloads.conf	(revision 170)
> +++ config/payloads/payloads.conf	(working copy)
> @@ -16,6 +16,7 @@
>  ### Include the correct payload configuration
>
> PCONF-y=
> +PCONF-$(CONFIG_PAYLOAD_ADLO) = adlo.conf
>  PCONF-$(CONFIG_PAYLOAD_LAB) = lab.conf
>  PCONF-$(CONFIG_PAYLOAD_ETHERBOOT) = etherboot.conf
>  PCONF-$(CONFIG_PAYLOAD_GPXE) = gpxe.conf
> @@ -28,6 +29,10 @@
>  PCONF-$(CONFIG_PAYLOAD_TINT) = tint.conf
>  PCONF-$(CONFIG_PAYLOAD_GRUB2) = grub2.conf
>
> +ifeq ($(PCONF-y),)
> +$(error No payload .conf file specified.)
> +endif
>
> DEPENDS-y=
>  include $(CONFIG_DIR)/payloads/$(PCONF-y)
> Index: config/payloads/adlo.conf
>
> --- config/payloads/adlo.conf	(revision 0)
> +++ config/payloads/adlo.conf	(revision 0)
> @@ -0,0 +1,15 @@
> +# Configuration file for the ADLO payload
>
> +# Common configuration options
>
> +PAYLOAD_BUILD=scripts/Makefile.generic
>
> +PAYLOAD_ELF=$(OUTPUT_DIR)/adlo-payload.elf
> +PAYLOAD_COMPRESSED=$(OUTPUT_DIR)/adlo-payload.elf.lzma
>
> +PAYLOAD=adlo
> +PAYLOAD-y=adlo
>
> +# Add legacybios as a dependency
> +PAYLOAD_AND_DEP_MK=$(PACKAGE_DIR)/legacybios/legacybios.mk $(PACKAGE_DIR)/adlo/adlo.mk
> +DEPENDS-y +=legacybios
> Index: config/payloads/Config.in
> ===================================================================
> --- config/payloads/Config.in	(revision 170)
> +++ config/payloads/Config.in	(working copy)
> @@ -9,6 +9,9 @@
>    help
>      Buildrom can build a number of different payloads for the ROM
>
> +config PAYLOAD_ADLO
> bool "ADLO (Bochs BIOS with a wrapper for Coreboot)"
>
> config PAYLOAD_COREINFO
>    bool "Coreinfo"