Re: [coreboot] brainstorm: new LPC dongle from Artec Group

[Marc Jones]

Stefan Reinauer wrote:
> Marc Jones wrote:
> > Stefan Reinauer wrote:
> > > Dear Martin-Éric,
> > > 0x3f8 serial port logging support on lpc. (Sorry, I never looked
> > >
> > > into this)
> >
> > Good idea.
> >
> > Power and reset headers are handy for remote development. Maybe the 
> > GPIO header could be used for that on the current model?
>
> Yes, I believe it could be done. The bigger task though is getting the 
> "reset LPC part after flash update" part right. The VHDL code locks the 
> LPC side of the dongle during flash update, so no interference can 
> happen. But it stays that way after the update. There might be reasons 
> for that, I am not sure.

Ah, I see. That would be a problem. Power and reset would be good for 
the automated testbed.

I can't find the twiki page for the automated testbed. Can you put a 
link on the mainpage or the qa page?

Marc