Re: [coreboot] POST code error "EE"

[Tadas Slotkus]

> I am trying to use coreboot with my mobo. Its a Jetway J7BXAN v2.1
> with i440BX NB, 82371EB SB and W83977EF SuperIO.
> I tried many coreboot images of various mobos with the same specs but
> I get stuck on 0xee code and Source code says:
>
> "0xee Not supposed to get here"

Hi there,
if you can please modify these files in your tree:

./arch/x86/init/crt0_romcc_epilogue.inc:24:	
./arch/x86/lib/c_start.S:85:

from the following list you may choose according to your cpu:
./cpu/intel/model_6fx/cache_as_ram.inc:258:	
./cpu/intel/car/cache_as_ram.inc:379:	
./cpu/intel/model_6ex/cache_as_ram.inc:254:	
./cpu/intel/model_106cx/cache_as_ram.inc:244:	
./cpu/via/car/cache_as_ram.inc:276:	
./cpu/amd/model_lx/cache_as_ram.inc:231:	
./cpu/amd/model_gx2/cache_as_ram.inc:205:

change post_code(POST_DEAD_CODE);
to post_code(0xii);
where ii is 20, 21, 22...
It will show you where it really goes off.
Do you get any serial output?

Thanks,
Tadas