Greetings,
I just tried an update/build/test for Clearwater and all is well there (except that slow spot check I still can't explain).
G'day, sjames
On 25 Oct 2002, Eric W. Biederman wrote:
I have committed so many files today I can barely track what I am doing. The result is that all of my oustanding code has now been pushed to the LinuxBIOS tree. So the supermicro/p4dpr and supermicro/p4dpe should now be stable ports of linuxBIOS. I would say so in the status file, but there isn't a single one in the whole tree.
Things other people will notice. The upx compressor code was integrated and is on by default. So you will get smaller linuxbios rom images. I accomplished this by explicitly factoring linuxbios into a C part that runs in ram and an assembly part that runs directly out of flash. The seperation was there before but now it is explicit. This greatly simplifies the linker scripts, so we are actually less likely to run into LD bugs now than before.
The config option is CONFIG_COMPRESS if you want to turn it off.
Other things of note. cmos.conf was renamed cmos.layout to reduce confusion. And a new checksum entry was added to the LinuxBIOS table so external programs can find the checksum that protects the LinuxBIOS options.
My code has been synced with the changes Steve James made for the Clearwater port.
There are microcode updates in the tree, and some other cpu fixups for the pentium 4.
Have fun, and hopefully nothing broke except the p4dc6, as they way it utilized the cache as ram trick depended on the muddy watters between code that ran in rom and ram. The code is fixable, if I turn off compression. It just requires a little magic to find the cache as ram entry point...
Eric _______________________________________________ Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios