On Thursday 31 May 2007 04:45, Feng, Libo wrote:
Hi, Mr. Juergen Beisert,
I mean that, just after power on, processor leaves the reset state, the first instruction is fetched from 0xFFFFFFF0, the address may be led to LPC, X-BUS or PCI. From other people's reply, it seems an external jumper decides the configuration, then chipset decoding logic leads the address to the right place. My understanding is correct?
Yes.
Juergen