On Thu, 30 Apr 2009 07:55:24 -0700, ron minnich rminnich@gmail.com wrote:
On Thu, Apr 30, 2009 at 5:37 AM, Joseph Smith joe@settoplinux.org
wrote:
Well, along the way I did learn a lot more about irq tables. Like each
line
in irq_tables.c is not actually a device but a route to the device/s.
There
can be multiple devices on a route. For example all of my USB devices
are
on the same route:
I think this is a mistinterpretaion. In PCI-speak, there is one device. Each device has several functions.
A device itself has only one wire -- there is one physical wire for that chip or device. It is called the interrupt line.
For reasons too long to go into here (basically, the PCI SIG made a slight mistake in designing interrupts) we need to have the IRQ table so we know mapping of IRQ wire from device to IRQ wire of bus/interrupt router, e.g. INTA of a chip/device may map to INTC of the bus and hence the interrupt router.
|- USB #1 |- USB #2
|- USB #3 |-
EHCI {0x00,(0x1d<<3)|0x0, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x62, 0x1ef8}, {0x6b, 0x01ef8}}, 0x0, 0x0},
is the same as:
{0x00,(0x1d<<3)|0x0, {{0x60, 0x1ef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, /* [A] USB UHCI 1 */ {0x00,(0x1d<<3)|0x1, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, /* [B] USB UHCI 2 */ {0x00,(0x1d<<3)|0x2, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x62, 0x1ef8}, {0x00, 0x00000}}, 0x0, 0x0}, /* [C] USB UHCI 3 */ {0x00,(0x1d<<3)|0x7, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x62, 0x1ef8}, {0x6b, 0x01ef8}}, 0x0, 0x0}, /* [D] EHCI */
no, not really. Functions don't have interrupts. The device itself has an interrupt.
I never really understood this until now. Also the "bus, dev|fn," can be diseaving becuase it only tells you the first device on the route INTA.
It tells you about that device. Those other things you mentioned are functions of that device.
If no one objects I would really like to add a section to the http://www.coreboot.org/Creating_Valid_IRQ_Tables page breaking down irq_tables.c and explaining what each part means. I think this would
help
people understand this very confusing process a little more.
I think your explanation is not really correct; you might want to re-read the spec fot that table to see what it's about. As it is you're going to confuse people :-)
I made this mistake myself on geode once before marc pointed it out to
me.
I will be glad when this aspect of PCI is gone.
Me too! Now you got me really confused just when I thought I had finally figured it out :-( Can you point me to some good reference docs then?