Hi all,
In Coreboot 4.4 (Intel baytrail FSP) early serial output use to work (first line being coreboot version followed by RTC Init) In Coreboot 4.5 it seems that serial output only works once the FSP initializes the serial port (first line being romstage_main_continue).
Notes: Setup for spew output, using the debug serial port lines. I am looking at what might have caused this but though I'd ask if this was a known issue, possibly already fixed with a patch or if it was an error on my part.
Note sure exactly where to search as I have already reviewed the changes in src/drivers/uart/uart8250io.c
Regards, Naveed Naveed Ghori | Lead Firmware & Driver Engineer DTI Group Ltd | Transit Security & Surveillance 31 Affleck Road, Perth Airport, Western Australia 6105, Australia P +61 8 9373 2905,151 | F +61 8 9479 1190 | naveed.ghori@dti.com.aumailto:naveed.ghori@dti.com.au
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