Hello Walfqang,
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Marc Jones Sent: Tuesday, January 17, 2012 3:23 AM To: Wolfgang Kamp - datakamp Cc: coreboot@coreboot.org Subject: Re: [coreboot] Issue with CIMX/SB800 PCIe Port Initialization
On Mon, Jan 16, 2012 at 10:18 AM, Wolfgang Kamp - datakamp wmkamp@datakamp.de wrote:
Hello,
I found a problem with the PCI enumeration of the PCIe Ports in the CIMX/SB800 Southbridge for the INAGUA platform.
The .../southbridge/amd/cimx/sb800/late.c routine calls the function sb_Before_PCI_Init after
case (0x16 >>3) | 2. This means when the PCI Express ports (0x15 <<3) |
0
are probed in the routine ../devices/pci_device.c function
pci_probe_dev they are not yet initialized. The probing fails and also devices behind the bridge are not recognized.
Behind the PCIe bridge I have an Intel 82574 LAN chip.
But if I move the call to sb_Before_PCI_Init behind case (0x15 <<3) |
0 the
enumeration succeed but coreboot crashes later into nothing. The Sage Debugger fails.
I can't imagine why.
Marc have you any idea?
This looks like a problem in the sb800 cimx wrapper logic. Cimx doesn't treat the devices separately. it lumps all the configuration and enables together, making the coreboot chipset device enable callback fail to enable the device, so it gets disabled. The sb900 wrapper appears to fix this issue with cimx setup in early init. You may want to try porting those changes to the sb800.
I don't know why it fails later, but I assume it is due to the missing config since you moved the call earlier in the process. You could try calling it multiple times. I'm not sure how it handles that, though.
Kerry, Do you have any comments?
If the enumeration fail, I suggest you should check the PCIE deassert GPIO setting. Thanks
Kerry
Marc
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