Author: svens Date: Sun Apr 10 09:41:56 2011 New Revision: 6483 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6483
Log: i945: improve get_top_of_ram()
The current version doesn't honor TSEG, and fails to report the correct top of RAM if IGD is disabled. This is because it uses the BSM (base of stolen RAM) register. In that case, we should use the TOLUD register.
Signed-off-by: Sven Schnelle svens@stackframe.org Acked-by: Stefan Reinauer stefan.reinauer@coreboot.org
Modified: trunk/src/northbridge/intel/i945/raminit.c
Modified: trunk/src/northbridge/intel/i945/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i945/raminit.c Sun Apr 10 06:15:23 2011 (r6482) +++ trunk/src/northbridge/intel/i945/raminit.c Sun Apr 10 09:41:56 2011 (r6483) @@ -3192,9 +3192,33 @@
unsigned long get_top_of_ram(void) { - /* This will not work if TSEG is in place! */ - u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c); + u32 tom;
+ if (pci_read_config8(PCI_DEV(0, 0x0, 0), DEVEN) & ((1 << 4) | (1 << 3))) { + /* IGD enabled, get top of Memory from BSM register */ + tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c); + } else { + tom = (pci_read_config8(PCI_DEV(0,0,0), TOLUD) & 0xf7) << 24; + } + + /* if TSEG enabled subtract size */ + switch(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM)) { + case 0x01: + /* 1MB TSEG */ + tom -= 0x10000; + break; + case 0x03: + /* 2MB TSEG */ + tom -= 0x20000; + break; + case 0x05: + /* 8MB TSEG */ + tom -= 0x80000; + break; + default: + /* TSEG either disabled or invalid */ + break; + } return (unsigned long) tom; }