On Monday 14 May 2007 16:52, Peter Stuge wrote:
On Mon, May 14, 2007 at 09:39:57AM +0200, Juergen Beisert wrote:
It seems to find a generic way to configure the SDRAM in a Geode bases system is nearly impossible.
I think it can be done.
At last we need some information about
- the physical behaviour of the mainboard (line load, line length
for delay calculation, max possible SDRAM clock, jitter and so on)
Create some new board options for the relevant parameters.
Any doc how to do? Naming conventions and policy?
- the type of connected SDRAM modules (soldered, SO-DIMM, DIMM ->
line load/length!)
This is just a subset of the above, right?
Yes and no. The above are fixed params. But you can change the SDRAM module so some params change (device count and load)
- the type of the SDRAM devices (timing requirements)
Is this not in SPD?
Yes.
Maybe we are able to detect the SPD EEPROM on *some* boards. But never on all boards. There are too many individual incarnations how you can connect the I2C lines to your CPU
Because of pin multiplexing you mean?
Yes and no. Where ever you have some spare GPIOs you can connect an I2C bus. And it seems every manufacurer did so. Some connect it to the companion chip, some to the multiIO, various multiIOs are possible. How to deal with it?
Make the relevant PMRs options (I think they should be anyway) and teach raminit how to decode them ss it knows how to do SPD.
raminit could call back some board specific routines to query for SDRAM params. And they handle it in a board specific way. Some ask the SPD EEPROM if they know how deal with the I2C, some other provide generic params, and some uses specific params as one know the SDRAM devices that are plugged in.
Juergen