On Sat, Feb 12, 2011 at 11:53 AM, xdrudis xdrudis@tinet.cat wrote:
On Sat, Feb 12, 2011 at 10:32:54AM -0700, Marc Jones wrote:
On Sat, Feb 12, 2011 at 12:03 AM, xdrudis xdrudis@tinet.cat wrote: ;;;
- AMD Athlon II X4 615e support
I have a Phenom II X4 910e Looks quite similar. Yours is revision RB_C3 also, I think?
I found fidvid.c did not suppport this version and coreboot hanged while setting frequency and voltage of the CPU. I've apparently fixed it but I have a 1600 lines patch, and I really should see how to break it up in chunks that can be reasonably reviewed . In fact for fidvid.c itself the patch is bigger than the file. I hope I can do something this weekend to break into decent patches...
It would be good to see this. The AMD BKDG has changed with regard to the VID setup since the code was added. I think that dual PVI works well, but SVI is suspect in my recent review of it. They two are not as different as once indicated.
My board is SVI, and I've tried to bring it to comply a little more with Fam10 Bios and Kernel Development Guide #31116, rev 3.48, April 22, 2010 . I hope it's the correct version.
There are still lots of FIXMEs, some paranoid checks and possibly some errors for any other hardware but mine. I even removed (with #if 0) a little code I couldn't make any sense with the documentation, I hope it doesn't break much.
The fid shouldn't require too much change. There are some features that are not supported, but nothing that should prevent booting at maxfid.
I basically found it only worked for revision B, but now I don't remember whether it was fid or vid. One of the hangs seemed to be the CPU refusing to go into a pstate out of limits and coreboot waiting infinetely for the CPU to get to that pstate.
I also don't know how much of what I've changed was really necessary, at a certain point I just got tired of random changes and decided to implement as much of the BKDG as I could and try again. Maybe some thing are in BKDG but are not really necessary for booting.
I'm attaching the monster. But I'm splitting it into many smaller patches, so it may be easier to read. So you may want to wait.
This is great. I see several key changes that should help SVI. I'll look for the smaller patches. They will be easier to work through.
My board still doesn't boot though. It currently gets to ram stage and hangs while enabling pci devices. It's similar to a problem I found in romstage and I worked around it with a patch that wasn't probably the right approach (it wasn't commited). This time I'll have to see what's causing it (likely that I have an RX781, not an RS780, it's more or less the same without graphics, but I may have to tweak something somehow).
This should be a matter of getting your lspci and the devicetree to match up. If there is no graphics, you will need to remove that and also look for any uma stuff that might be left around.
I tried to match lspci and devicetree.cb, but I may have got it wrong. I didn't know that uma could hang a pci read. It basically works for pci devices, but once it gets to where the external graphics card should be (00:02.0) it hangs there.
This may be a 780 PCIe config issue. It can be set to a number of different configurations for links and lanes. You'll want to take a look at the 780 RPR section 5.5 to start. Settings from the vendor BIOS should also help you understand how it is connected.
Marc