Ronald G. Minnich (rminnich@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2376
-gerrit
commit 023d2b7359f724ac6c40530c9b8de7d09a4a602e Author: Stefan Reinauer reinauer@chromium.org Date: Tue Feb 12 14:17:15 2013 -0800
sconfig: rename pci_domain -> domain
The name pci_domain was a bit misleading, since the construct is only PCI specific in a particular (northbridge/cpu) implementation, but not by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-PCI systems without adding new keywords.
Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85 Signed-off-by: Stefan Reinauer reinauer@google.com --- documentation/Kconfig.tex | 4 +- src/arch/x86/boot/mpspec.c | 2 +- src/cpu/amd/sc520/sc520.c | 2 +- src/device/device.c | 8 +- src/device/device_util.c | 10 +- src/include/device/path.h | 6 +- src/mainboard/a-trend/atc-6220/devicetree.cb | 2 +- src/mainboard/a-trend/atc-6240/devicetree.cb | 2 +- src/mainboard/aaeon/pfm-540i_revb/devicetree.cb | 2 +- src/mainboard/abit/be6-ii_v2_0/devicetree.cb | 2 +- src/mainboard/advansus/a785e-i/devicetree.cb | 4 +- src/mainboard/advantech/pcm-5820/devicetree.cb | 2 +- src/mainboard/amd/bimini_fam10/devicetree.cb | 8 +- src/mainboard/amd/db800/devicetree.cb | 2 +- src/mainboard/amd/dbm690t/devicetree.cb | 4 +- src/mainboard/amd/dinar/devicetree.cb | 4 +- src/mainboard/amd/inagua/devicetree.cb | 4 +- src/mainboard/amd/mahogany/devicetree.cb | 4 +- src/mainboard/amd/mahogany_fam10/devicetree.cb | 8 +- src/mainboard/amd/norwich/devicetree.cb | 2 +- src/mainboard/amd/parmer/devicetree.cb | 4 +- src/mainboard/amd/persimmon/devicetree.cb | 4 +- src/mainboard/amd/pistachio/devicetree.cb | 4 +- src/mainboard/amd/rumba/devicetree.cb | 2 +- src/mainboard/amd/serengeti_cheetah/devicetree.cb | 4 +- .../amd/serengeti_cheetah_fam10/devicetree.cb | 8 +- src/mainboard/amd/south_station/devicetree.cb | 4 +- src/mainboard/amd/thatcher/devicetree.cb | 4 +- src/mainboard/amd/tilapia_fam10/devicetree.cb | 8 +- src/mainboard/amd/torpedo/devicetree.cb | 4 +- src/mainboard/amd/union_station/devicetree.cb | 4 +- src/mainboard/aopen/dxplplusu/devicetree.cb | 4 +- src/mainboard/arima/hdama/devicetree.cb | 2 +- src/mainboard/artecgroup/dbe61/devicetree.cb | 2 +- src/mainboard/asi/mb_5blgp/devicetree.cb | 2 +- src/mainboard/asi/mb_5blmp/devicetree.cb | 2 +- src/mainboard/asrock/939a785gmh/devicetree.cb | 4 +- src/mainboard/asrock/e350m1/devicetree.cb | 4 +- src/mainboard/asus/a8n_e/devicetree.cb | 2 +- src/mainboard/asus/a8v-e_deluxe/devicetree.cb | 2 +- src/mainboard/asus/a8v-e_se/devicetree.cb | 2 +- src/mainboard/asus/dsbf/devicetree.cb | 2 +- src/mainboard/asus/k8v-x/devicetree.cb | 2 +- src/mainboard/asus/m2n-e/devicetree.cb | 2 +- src/mainboard/asus/m2v-mx_se/devicetree.cb | 2 +- src/mainboard/asus/m2v/devicetree.cb | 2 +- src/mainboard/asus/m4a78-em/devicetree.cb | 4 +- src/mainboard/asus/m4a785-m/devicetree.cb | 4 +- src/mainboard/asus/m4a785t-m/devicetree.cb | 4 +- src/mainboard/asus/m5a88-v/devicetree.cb | 4 +- src/mainboard/asus/mew-am/devicetree.cb | 2 +- src/mainboard/asus/mew-vm/devicetree.cb | 2 +- src/mainboard/asus/p2b-d/devicetree.cb | 2 +- src/mainboard/asus/p2b-ds/devicetree.cb | 2 +- src/mainboard/asus/p2b-f/devicetree.cb | 2 +- src/mainboard/asus/p2b-ls/devicetree.cb | 2 +- src/mainboard/asus/p2b/devicetree.cb | 2 +- src/mainboard/asus/p3b-f/devicetree.cb | 2 +- src/mainboard/avalue/eax-785e/devicetree.cb | 4 +- src/mainboard/axus/tc320/devicetree.cb | 2 +- src/mainboard/azza/pt-6ibd/devicetree.cb | 2 +- src/mainboard/bachmann/ot200/devicetree.cb | 2 +- src/mainboard/bcom/winnet100/devicetree.cb | 2 +- src/mainboard/bcom/winnetp680/devicetree.cb | 2 +- src/mainboard/bifferos/bifferboard/devicetree.cb | 2 +- src/mainboard/biostar/m6tba/devicetree.cb | 2 +- src/mainboard/broadcom/blast/devicetree.cb | 4 +- .../compaq/deskpro_en_sff_p600/devicetree.cb | 2 +- src/mainboard/digitallogic/adl855pc/devicetree.cb | 2 +- src/mainboard/digitallogic/msm586seg/devicetree.cb | 2 +- src/mainboard/digitallogic/msm800sev/devicetree.cb | 2 +- src/mainboard/eaglelion/5bcm/devicetree.cb | 2 +- src/mainboard/ecs/p6iwp-fe/devicetree.cb | 2 +- src/mainboard/emulation/qemu-x86/devicetree.cb | 2 +- src/mainboard/emulation/qemu-x86/northbridge.c | 2 +- src/mainboard/getac/p470/devicetree.cb | 2 +- src/mainboard/gigabyte/ga-6bxc/devicetree.cb | 2 +- src/mainboard/gigabyte/ga-6bxe/devicetree.cb | 2 +- src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb | 2 +- src/mainboard/gigabyte/m57sli/devicetree.cb | 2 +- src/mainboard/gigabyte/ma785gm/devicetree.cb | 4 +- src/mainboard/gigabyte/ma785gmt/devicetree.cb | 4 +- src/mainboard/gigabyte/ma78gm/devicetree.cb | 4 +- src/mainboard/google/butterfly/devicetree.cb | 2 +- src/mainboard/google/parrot/devicetree.cb | 2 +- src/mainboard/hp/dl145_g1/devicetree.cb | 2 +- src/mainboard/hp/dl145_g3/devicetree.cb | 4 +- src/mainboard/hp/dl165_g6_fam10/devicetree.cb | 4 +- src/mainboard/hp/e_vectra_p2706t/devicetree.cb | 2 +- src/mainboard/ibase/mb899/devicetree.cb | 2 +- src/mainboard/ibm/e325/devicetree.cb | 2 +- src/mainboard/ibm/e326/devicetree.cb | 2 +- src/mainboard/iei/juki-511p/devicetree.cb | 2 +- src/mainboard/iei/kino-780am2-fam10/devicetree.cb | 4 +- src/mainboard/iei/nova4899r/devicetree.cb | 2 +- src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb | 2 +- src/mainboard/iei/pm-lx-800-r11/devicetree.cb | 2 +- src/mainboard/iei/pm-lx2-800-r10/devicetree.cb | 2 +- src/mainboard/intel/d810e2cb/devicetree.cb | 2 +- src/mainboard/intel/d945gclf/devicetree.cb | 2 +- src/mainboard/intel/eagleheights/devicetree.cb | 2 +- src/mainboard/intel/emeraldlake2/devicetree.cb | 2 +- src/mainboard/intel/jarrell/devicetree.cb | 2 +- src/mainboard/intel/mtarvon/devicetree.cb | 2 +- src/mainboard/intel/truxton/devicetree.cb | 2 +- src/mainboard/intel/xe7501devkit/devicetree.cb | 4 +- src/mainboard/iwave/iWRainbowG6/devicetree.cb | 2 +- src/mainboard/iwill/dk8_htx/devicetree.cb | 4 +- src/mainboard/iwill/dk8s2/devicetree.cb | 2 +- src/mainboard/iwill/dk8x/devicetree.cb | 2 +- src/mainboard/jetway/j7f24/devicetree.cb | 2 +- src/mainboard/jetway/pa78vm5/devicetree.cb | 4 +- src/mainboard/kontron/986lcd-m/devicetree.cb | 2 +- src/mainboard/kontron/kt690/devicetree.cb | 4 +- src/mainboard/lanner/em8510/devicetree.cb | 2 +- src/mainboard/lenovo/t60/devicetree.cb | 2 +- src/mainboard/lenovo/x60/devicetree.cb | 2 +- src/mainboard/lippert/frontrunner/devicetree.cb | 2 +- src/mainboard/lippert/hurricane-lx/devicetree.cb | 2 +- src/mainboard/lippert/literunner-lx/devicetree.cb | 2 +- src/mainboard/lippert/roadrunner-lx/devicetree.cb | 2 +- src/mainboard/lippert/spacerunner-lx/devicetree.cb | 2 +- src/mainboard/mitac/6513wu/devicetree.cb | 2 +- src/mainboard/msi/ms6119/devicetree.cb | 2 +- src/mainboard/msi/ms6147/devicetree.cb | 2 +- src/mainboard/msi/ms6156/devicetree.cb | 2 +- src/mainboard/msi/ms6178/devicetree.cb | 2 +- src/mainboard/msi/ms7135/devicetree.cb | 2 +- src/mainboard/msi/ms7260/devicetree.cb | 2 +- src/mainboard/msi/ms9185/devicetree.cb | 4 +- src/mainboard/msi/ms9282/devicetree.cb | 2 +- src/mainboard/msi/ms9652_fam10/devicetree.cb | 2 +- src/mainboard/nec/powermate2000/devicetree.cb | 2 +- src/mainboard/newisys/khepri/devicetree.cb | 2 +- src/mainboard/nokia/ip530/devicetree.cb | 2 +- src/mainboard/nvidia/l1_2pvv/devicetree.cb | 2 +- src/mainboard/pcengines/alix1c/devicetree.cb | 2 +- src/mainboard/pcengines/alix2d/devicetree.cb | 2 +- src/mainboard/rca/rm4100/devicetree.cb | 2 +- src/mainboard/roda/rk886ex/devicetree.cb | 2 +- src/mainboard/roda/rk9/devicetree.cb | 2 +- src/mainboard/samsung/lumpy/devicetree.cb | 2 +- src/mainboard/samsung/stumpy/devicetree.cb | 2 +- src/mainboard/siemens/sitemp_g1p1/devicetree.cb | 4 +- src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb | 2 +- src/mainboard/sunw/ultra40/devicetree.cb | 2 +- src/mainboard/supermicro/h8dme/devicetree.cb | 2 +- src/mainboard/supermicro/h8dmr/devicetree.cb | 2 +- src/mainboard/supermicro/h8dmr_fam10/devicetree.cb | 2 +- src/mainboard/supermicro/h8qgi/devicetree.cb | 4 +- src/mainboard/supermicro/h8qme_fam10/devicetree.cb | 2 +- src/mainboard/supermicro/h8scm/devicetree.cb | 4 +- src/mainboard/supermicro/h8scm_fam10/devicetree.cb | 8 +- src/mainboard/supermicro/x6dai_g/devicetree.cb | 2 +- src/mainboard/supermicro/x6dhe_g/devicetree.cb | 2 +- src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 2 +- src/mainboard/supermicro/x6dhr_ig/devicetree.cb | 2 +- src/mainboard/supermicro/x6dhr_ig2/devicetree.cb | 2 +- src/mainboard/supermicro/x7db8/devicetree.cb | 2 +- src/mainboard/technexion/tim5690/devicetree.cb | 4 +- src/mainboard/technexion/tim8690/devicetree.cb | 4 +- src/mainboard/technologic/ts5300/devicetree.cb | 2 +- src/mainboard/televideo/tc7020/devicetree.cb | 2 +- src/mainboard/thomson/ip1000/devicetree.cb | 2 +- src/mainboard/traverse/geos/devicetree.cb | 2 +- src/mainboard/tyan/s1846/devicetree.cb | 2 +- src/mainboard/tyan/s2735/devicetree.cb | 4 +- src/mainboard/tyan/s2850/devicetree.cb | 2 +- src/mainboard/tyan/s2875/devicetree.cb | 2 +- src/mainboard/tyan/s2880/devicetree.cb | 2 +- src/mainboard/tyan/s2881/devicetree.cb | 2 +- src/mainboard/tyan/s2882/devicetree.cb | 4 +- src/mainboard/tyan/s2885/devicetree.cb | 4 +- src/mainboard/tyan/s2891/devicetree.cb | 2 +- src/mainboard/tyan/s2892/devicetree.cb | 2 +- src/mainboard/tyan/s2895/devicetree.cb | 2 +- src/mainboard/tyan/s2912/devicetree.cb | 2 +- src/mainboard/tyan/s2912_fam10/devicetree.cb | 2 +- src/mainboard/tyan/s4880/devicetree.cb | 4 +- src/mainboard/tyan/s4882/devicetree.cb | 2 +- src/mainboard/tyan/s8226/devicetree.cb | 4 +- src/mainboard/via/epia-cn/devicetree.cb | 2 +- src/mainboard/via/epia-m/devicetree.cb | 2 +- src/mainboard/via/epia-m700/devicetree.cb | 2 +- src/mainboard/via/epia-n/devicetree.cb | 2 +- src/mainboard/via/epia/devicetree.cb | 2 +- src/mainboard/via/pc2500e/devicetree.cb | 2 +- src/mainboard/via/vt8454c/devicetree.cb | 2 +- src/mainboard/winent/pl6064/devicetree.cb | 2 +- src/mainboard/wyse/s50/devicetree.cb | 2 +- src/northbridge/amd/agesa/family10/northbridge.c | 6 +- src/northbridge/amd/agesa/family12/northbridge.c | 2 +- src/northbridge/amd/agesa/family14/northbridge.c | 4 +- src/northbridge/amd/agesa/family15/northbridge.c | 8 +- src/northbridge/amd/agesa/family15tn/northbridge.c | 8 +- src/northbridge/amd/amdfam10/northbridge.c | 6 +- src/northbridge/amd/amdk8/northbridge.c | 2 +- src/northbridge/amd/gx1/northbridge.c | 4 +- src/northbridge/amd/gx2/northbridge.c | 2 +- src/northbridge/amd/lx/northbridge.c | 2 +- src/northbridge/intel/e7501/northbridge.c | 2 +- src/northbridge/intel/e7505/northbridge.c | 2 +- src/northbridge/intel/e7520/northbridge.c | 2 +- src/northbridge/intel/e7525/northbridge.c | 2 +- src/northbridge/intel/gm45/northbridge.c | 2 +- src/northbridge/intel/i3100/northbridge.c | 2 +- src/northbridge/intel/i440bx/northbridge.c | 2 +- src/northbridge/intel/i440lx/northbridge.c | 2 +- src/northbridge/intel/i5000/northbridge.c | 2 +- src/northbridge/intel/i82810/northbridge.c | 2 +- src/northbridge/intel/i82830/northbridge.c | 2 +- src/northbridge/intel/i855/northbridge.c | 2 +- src/northbridge/intel/i945/northbridge.c | 2 +- src/northbridge/intel/sandybridge/northbridge.c | 2 +- src/northbridge/intel/sch/northbridge.c | 2 +- src/northbridge/rdc/r8610/northbridge.c | 2 +- src/northbridge/via/cn400/northbridge.c | 2 +- src/northbridge/via/cn700/northbridge.c | 2 +- src/northbridge/via/cx700/northbridge.c | 2 +- src/northbridge/via/vt8601/northbridge.c | 2 +- src/northbridge/via/vt8623/northbridge.c | 2 +- src/northbridge/via/vx800/northbridge.c | 2 +- src/southbridge/nvidia/ck804/pci.c | 2 +- src/southbridge/nvidia/mcp55/pci.c | 2 +- util/sconfig/lex.yy.c_shipped | 172 ++++++++++----------- util/sconfig/main.c | 10 +- util/sconfig/sconfig.l | 2 +- util/sconfig/sconfig.tab.c_shipped | 4 +- util/sconfig/sconfig.tab.h_shipped | 2 +- util/sconfig/sconfig.y | 2 +- 230 files changed, 400 insertions(+), 400 deletions(-)
diff --git a/documentation/Kconfig.tex b/documentation/Kconfig.tex index e8e3f41..1739c05 100644 --- a/documentation/Kconfig.tex +++ b/documentation/Kconfig.tex @@ -163,7 +163,7 @@ Note that we do not enumerate all CPUs, even on this SMP mainboard. The reason i is the so-called Boot Strap Processor, or BSP; the other CPUs will come along later, as the are discovered. We do not require (unlike many BIOSes) that the BSP be CPU 0; any CPU will do. \begin{verbatim} - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 @@ -338,7 +338,7 @@ That's it for the BSP I/O and HT busses. Now we begin the AP busses. Not much he
\end{verbatim} \begin{verbatim} - end #pci_domain + end # domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/arch/x86/boot/mpspec.c b/src/arch/x86/boot/mpspec.c index cf346a5..5d01434 100644 --- a/src/arch/x86/boot/mpspec.c +++ b/src/arch/x86/boot/mpspec.c @@ -502,7 +502,7 @@ unsigned long __attribute__((weak)) write_smp_table(unsigned long addr) break; }
- if (parent->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (parent->path.type == DEVICE_PATH_DOMAIN) { printk(BIOS_WARNING, "no IRQ found for %s\n", dev_path(dev)); break; } diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c index 6954f44..b0824a7 100644 --- a/src/cpu/amd/sc520/sc520.c +++ b/src/cpu/amd/sc520/sc520.c @@ -186,7 +186,7 @@ static void enable_dev(struct device *dev) { printk(BIOS_SPEW, "%s\n", __func__); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/device/device.c b/src/device/device.c index 07bbc7a..e0c8bf0 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -994,7 +994,7 @@ void dev_configure(void)
/* Compute resources for all domains. */ for (child = root->link_list->children; child; child = child->sibling) { - if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN)) + if (!(child->path.type == DEVICE_PATH_DOMAIN)) continue; for (res = child->resource_list; res; res = res->next) { if (res->flags & IORESOURCE_FIXED) @@ -1019,7 +1019,7 @@ void dev_configure(void)
/* For all domains. */ for (child = root->link_list->children; child; child=child->sibling) - if (child->path.type == DEVICE_PATH_PCI_DOMAIN) + if (child->path.type == DEVICE_PATH_DOMAIN) avoid_fixed_resources(child);
/* @@ -1027,7 +1027,7 @@ void dev_configure(void) * the highest address managable. */ for (child = root->link_list->children; child; child = child->sibling) { - if (child->path.type != DEVICE_PATH_PCI_DOMAIN) + if (child->path.type != DEVICE_PATH_DOMAIN) continue; for (res = child->resource_list; res; res = res->next) { if (!(res->flags & IORESOURCE_MEM) || @@ -1040,7 +1040,7 @@ void dev_configure(void) /* Store the computed resource allocations into device registers ... */ printk(BIOS_INFO, "Setting resources...\n"); for (child = root->link_list->children; child; child = child->sibling) { - if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN)) + if (!(child->path.type == DEVICE_PATH_DOMAIN)) continue; for (res = child->resource_list; res; res = res->next) { if (res->flags & IORESOURCE_FIXED) diff --git a/src/device/device_util.c b/src/device/device_util.c index 224c58e..60f555a 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -205,9 +205,9 @@ const char *dev_path(device_t dev) sprintf(buffer, "IOAPIC: %02x", dev->path.ioapic.ioapic_id); break; - case DEVICE_PATH_PCI_DOMAIN: - sprintf(buffer, "PCI_DOMAIN: %04x", - dev->path.pci_domain.domain); + case DEVICE_PATH_DOMAIN: + sprintf(buffer, "DOMAIN: %04x", + dev->path.domain.domain); break; case DEVICE_PATH_APIC_CLUSTER: sprintf(buffer, "APIC_CLUSTER: %01x", @@ -271,8 +271,8 @@ int path_eq(struct device_path *path1, struct device_path *path2) case DEVICE_PATH_APIC: equal = (path1->apic.apic_id == path2->apic.apic_id); break; - case DEVICE_PATH_PCI_DOMAIN: - equal = (path1->pci_domain.domain == path2->pci_domain.domain); + case DEVICE_PATH_DOMAIN: + equal = (path1->domain.domain == path2->domain.domain); break; case DEVICE_PATH_APIC_CLUSTER: equal = (path1->apic_cluster.cluster diff --git a/src/include/device/path.h b/src/include/device/path.h index 16ad8f9..c59b49e 100644 --- a/src/include/device/path.h +++ b/src/include/device/path.h @@ -8,14 +8,14 @@ enum device_path_type { DEVICE_PATH_PNP, DEVICE_PATH_I2C, DEVICE_PATH_APIC, - DEVICE_PATH_PCI_DOMAIN, + DEVICE_PATH_DOMAIN, DEVICE_PATH_APIC_CLUSTER, DEVICE_PATH_CPU, DEVICE_PATH_CPU_BUS, DEVICE_PATH_IOAPIC, };
-struct pci_domain_path +struct domain_path { unsigned domain; }; @@ -74,7 +74,7 @@ struct device_path { struct i2c_path i2c; struct apic_path apic; struct ioapic_path ioapic; - struct pci_domain_path pci_domain; + struct domain_path domain; struct apic_cluster_path apic_cluster; struct cpu_path cpu; struct cpu_bus_path cpu_bus; diff --git a/src/mainboard/a-trend/atc-6220/devicetree.cb b/src/mainboard/a-trend/atc-6220/devicetree.cb index 4ab61c4..3e83186 100644 --- a/src/mainboard/a-trend/atc-6220/devicetree.cb +++ b/src/mainboard/a-trend/atc-6220/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/a-trend/atc-6240/devicetree.cb b/src/mainboard/a-trend/atc-6240/devicetree.cb index 7a2b9a9..7625fa6 100644 --- a/src/mainboard/a-trend/atc-6240/devicetree.cb +++ b/src/mainboard/a-trend/atc-6240/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb index 3987584..9737b01 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb +++ b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb b/src/mainboard/abit/be6-ii_v2_0/devicetree.cb index 9c7cf56..a85a861 100644 --- a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb +++ b/src/mainboard/abit/be6-ii_v2_0/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/advansus/a785e-i/devicetree.cb b/src/mainboard/advansus/a785e-i/devicetree.cb index 79df8c9..a356f79 100644 --- a/src/mainboard/advansus/a785e-i/devicetree.cb +++ b/src/mainboard/advansus/a785e-i/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1612 0x3060 inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -120,5 +120,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb index b77fd06..8027ee2 100644 --- a/src/mainboard/advantech/pcm-5820/devicetree.cb +++ b/src/mainboard/advantech/pcm-5820/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/amd/bimini_fam10/devicetree.cb b/src/mainboard/amd/bimini_fam10/devicetree.cb index a5bec74..cc62466 100644 --- a/src/mainboard/amd/bimini_fam10/devicetree.cb +++ b/src/mainboard/amd/bimini_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -76,9 +76,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -90,7 +90,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain
# chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb index e0f20dc..1a1db6d 100644 --- a/src/mainboard/amd/db800/devicetree.cb +++ b/src/mainboard/amd/db800/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index e1b01b2..b92a666 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -117,6 +117,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/amd/dinar/devicetree.cb b/src/mainboard/amd/dinar/devicetree.cb index 3211a2f..9e2c61a 100644 --- a/src/mainboard/amd/dinar/devicetree.cb +++ b/src/mainboard/amd/dinar/devicetree.cb @@ -23,7 +23,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x20 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1705 inherit chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology to satisfy both f10 and f15 CPUs @@ -98,6 +98,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex
diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index 100a5cc..b0d5fcb 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -88,6 +88,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/amd/mahogany/devicetree.cb b/src/mainboard/amd/mahogany/devicetree.cb index d60d5a1..11f4b3c 100644 --- a/src/mainboard/amd/mahogany/devicetree.cb +++ b/src/mainboard/amd/mahogany/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -117,5 +117,5 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex diff --git a/src/mainboard/amd/mahogany_fam10/devicetree.cb b/src/mainboard/amd/mahogany_fam10/devicetree.cb index c51e53e..c5cbb1c 100644 --- a/src/mainboard/amd/mahogany_fam10/devicetree.cb +++ b/src/mainboard/amd/mahogany_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,9 +110,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -124,7 +124,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain
# chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/norwich/devicetree.cb b/src/mainboard/amd/norwich/devicetree.cb index b2ede77..6a0299b 100644 --- a/src/mainboard/amd/norwich/devicetree.cb +++ b/src/mainboard/amd/norwich/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb index 9dbdc98..9942ffe 100644 --- a/src/mainboard/amd/parmer/devicetree.cb +++ b/src/mainboard/amd/parmer/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/agesa/family15tn/root_complex end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1410 inherit chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
@@ -86,5 +86,5 @@ chip northbridge/amd/agesa/family15tn/root_complex }"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex - end #pci_domain + end #domain end #chip northbridge/amd/agesa/family15tn/root_complex diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index 12cb62f..1eab2f5 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -152,5 +152,5 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index 6608fdd..4f16ea7 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge, K8 HT Configuration @@ -76,6 +76,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end # K8 DRAM Controller and HT Trace Mode device pci 18.3 on end # K8 Miscellaneous Control end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb index e55f5c7..db51f65 100644 --- a/src/mainboard/amd/rumba/devicetree.cb +++ b/src/mainboard/amd/rumba/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/gx2 device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index b819292..ac0e00e 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -143,7 +143,7 @@ chip northbridge/amd/amdk8/root_complex end
- end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb index bfbb2b3..40805c6 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -118,9 +118,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -132,7 +132,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain
# chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb index f0b471a..be6f52e 100644 --- a/src/mainboard/amd/south_station/devicetree.cb +++ b/src/mainboard/amd/south_station/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -100,6 +100,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb index ccb8b58..e468cce 100644 --- a/src/mainboard/amd/thatcher/devicetree.cb +++ b/src/mainboard/amd/thatcher/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/agesa/family15tn/root_complex end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1410 inherit chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
@@ -101,5 +101,5 @@ chip northbridge/amd/agesa/family15tn/root_complex }"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex - end #pci_domain + end #domain end #chip northbridge/amd/agesa/family15tn/root_complex diff --git a/src/mainboard/amd/tilapia_fam10/devicetree.cb b/src/mainboard/amd/tilapia_fam10/devicetree.cb index aeb582a..ae25336 100644 --- a/src/mainboard/amd/tilapia_fam10/devicetree.cb +++ b/src/mainboard/amd/tilapia_fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -111,9 +111,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -125,7 +125,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain
# chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/amd/torpedo/devicetree.cb b/src/mainboard/amd/torpedo/devicetree.cb index 2b6d896..bd4f49b 100755 --- a/src/mainboard/amd/torpedo/devicetree.cb +++ b/src/mainboard/amd/torpedo/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family12/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1705 inherit chip northbridge/amd/agesa/family12 # CPU side of HT root complex chip northbridge/amd/agesa/family12 # PCI side of HT root complex @@ -85,6 +85,6 @@ chip northbridge/amd/agesa/family12/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family12/root_complex
diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb index 857bc02..4f08cfb 100644 --- a/src/mainboard/amd/union_station/devicetree.cb +++ b/src/mainboard/amd/union_station/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -76,6 +76,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.4 on end device pci 18.5 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/aopen/dxplplusu/devicetree.cb b/src/mainboard/aopen/dxplplusu/devicetree.cb index 94a38d7..5461462 100644 --- a/src/mainboard/aopen/dxplplusu/devicetree.cb +++ b/src/mainboard/aopen/dxplplusu/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/e7505 end end
- device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Chipset host controller device pci 0.1 on end # Host RASUM controller device pci 2.0 on # Hub interface B @@ -86,5 +86,5 @@ chip northbridge/intel/e7505 device pci 1f.5 on end # AC97 Audio device pci 1f.6 off end # AC97 Modem end # SB - end # PCI_DOMAIN + end # PCI domain end diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index d7252e2..fbf29c5 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3016 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/artecgroup/dbe61/devicetree.cb b/src/mainboard/artecgroup/dbe61/devicetree.cb index c8110d1..2f1f802 100644 --- a/src/mainboard/artecgroup/dbe61/devicetree.cb +++ b/src/mainboard/artecgroup/dbe61/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/asi/mb_5blgp/devicetree.cb b/src/mainboard/asi/mb_5blgp/devicetree.cb index 3ad1acb..d84bf0e 100644 --- a/src/mainboard/asi/mb_5blgp/devicetree.cb +++ b/src/mainboard/asi/mb_5blgp/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 on end # Ethernet diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb index e3e0d95..e8e6ac3 100644 --- a/src/mainboard/asi/mb_5blmp/devicetree.cb +++ b/src/mainboard/asi/mb_5blmp/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 off end # Ethernet (Realtek RTL8139B) diff --git a/src/mainboard/asrock/939a785gmh/devicetree.cb b/src/mainboard/asrock/939a785gmh/devicetree.cb index 1dc92a3..5f81d83 100644 --- a/src/mainboard/asrock/939a785gmh/devicetree.cb +++ b/src/mainboard/asrock/939a785gmh/devicetree.cb @@ -15,7 +15,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -127,6 +127,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index a4bdc65..1fed8ac 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family14/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x1510 inherit chip northbridge/amd/agesa/family14 # CPU side of HT root complex # device pci 18.0 on # northbridge @@ -128,6 +128,6 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.6 on end device pci 18.7 on end end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family14/root_complex
diff --git a/src/mainboard/asus/a8n_e/devicetree.cb b/src/mainboard/asus/a8n_e/devicetree.cb index 86bf3aa..dbb27dc 100644 --- a/src/mainboard/asus/a8n_e/devicetree.cb +++ b/src/mainboard/asus/a8n_e/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end
- device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0x815a inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb index 31df8fa..b77601d 100644 --- a/src/mainboard/asus/a8v-e_deluxe/devicetree.cb +++ b/src/mainboard/asus/a8v-e_deluxe/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/a8v-e_se/devicetree.cb b/src/mainboard/asus/a8v-e_se/devicetree.cb index 3da93fe..5ace9ea 100644 --- a/src/mainboard/asus/a8v-e_se/devicetree.cb +++ b/src/mainboard/asus/a8v-e_se/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/dsbf/devicetree.cb b/src/mainboard/asus/dsbf/devicetree.cb index b18fdaf..958ab93 100644 --- a/src/mainboard/asus/dsbf/devicetree.cb +++ b/src/mainboard/asus/dsbf/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i5000 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x1043 0x81db end diff --git a/src/mainboard/asus/k8v-x/devicetree.cb b/src/mainboard/asus/k8v-x/devicetree.cb index 61c5a2d..74c96ba 100644 --- a/src/mainboard/asus/k8v-x/devicetree.cb +++ b/src/mainboard/asus/k8v-x/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m2n-e/devicetree.cb b/src/mainboard/asus/m2n-e/devicetree.cb index bf4de25..2d92017 100644 --- a/src/mainboard/asus/m2n-e/devicetree.cb +++ b/src/mainboard/asus/m2n-e/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0x8239 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/asus/m2v-mx_se/devicetree.cb b/src/mainboard/asus/m2v-mx_se/devicetree.cb index 7e4c6d1..d3b5c1b 100644 --- a/src/mainboard/asus/m2v-mx_se/devicetree.cb +++ b/src/mainboard/asus/m2v-mx_se/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m2v/devicetree.cb b/src/mainboard/asus/m2v/devicetree.cb index 376dbf1..3e52394 100644 --- a/src/mainboard/asus/m2v/devicetree.cb +++ b/src/mainboard/asus/m2v/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1043 0 inherit chip northbridge/amd/amdk8 # mc0 device pci 18.0 on # Northbridge diff --git a/src/mainboard/asus/m4a78-em/devicetree.cb b/src/mainboard/asus/m4a78-em/devicetree.cb index c463d71..bbf4b3d 100644 --- a/src/mainboard/asus/m4a78-em/devicetree.cb +++ b/src/mainboard/asus/m4a78-em/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83f1 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -102,5 +102,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m4a785-m/devicetree.cb b/src/mainboard/asus/m4a785-m/devicetree.cb index e8764b1..e6bd174 100644 --- a/src/mainboard/asus/m4a785-m/devicetree.cb +++ b/src/mainboard/asus/m4a785-m/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83a2 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -102,5 +102,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb index 0299fc2..2817b63 100644 --- a/src/mainboard/asus/m4a785t-m/devicetree.cb +++ b/src/mainboard/asus/m4a785t-m/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x83a2 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -104,5 +104,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end # chip northbridge - end #pci_domain + end #domain end # northbridge/amd/amdfam10/root_complex diff --git a/src/mainboard/asus/m5a88-v/devicetree.cb b/src/mainboard/asus/m5a88-v/devicetree.cb index 5270c28..1590b9f 100644 --- a/src/mainboard/asus/m5a88-v/devicetree.cb +++ b/src/mainboard/asus/m5a88-v/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1043 0x843e inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -120,5 +120,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/asus/mew-am/devicetree.cb b/src/mainboard/asus/mew-am/devicetree.cb index a4b80e1..cf04dc1 100644 --- a/src/mainboard/asus/mew-am/devicetree.cb +++ b/src/mainboard/asus/mew-am/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb index 29d706c..e0cc9e3 100644 --- a/src/mainboard/asus/mew-vm/devicetree.cb +++ b/src/mainboard/asus/mew-vm/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i82810 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on # Onboard Video # device pci 1.0 on end diff --git a/src/mainboard/asus/p2b-d/devicetree.cb b/src/mainboard/asus/p2b-d/devicetree.cb index 64219b7..fb50362 100644 --- a/src/mainboard/asus/p2b-d/devicetree.cb +++ b/src/mainboard/asus/p2b-d/devicetree.cb @@ -7,7 +7,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 1 on end # Local APIC of CPU 1 end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-ds/devicetree.cb b/src/mainboard/asus/p2b-ds/devicetree.cb index 8a00f57..b7310dd 100644 --- a/src/mainboard/asus/p2b-ds/devicetree.cb +++ b/src/mainboard/asus/p2b-ds/devicetree.cb @@ -7,7 +7,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 1 on end # Local APIC of CPU 1 end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-f/devicetree.cb b/src/mainboard/asus/p2b-f/devicetree.cb index 6fae008..f88a8f8 100644 --- a/src/mainboard/asus/p2b-f/devicetree.cb +++ b/src/mainboard/asus/p2b-f/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b-ls/devicetree.cb b/src/mainboard/asus/p2b-ls/devicetree.cb index cc8281b..39f4246 100644 --- a/src/mainboard/asus/p2b-ls/devicetree.cb +++ b/src/mainboard/asus/p2b-ls/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b/devicetree.cb b/src/mainboard/asus/p2b/devicetree.cb index f4bfbad..0feb7e4 100644 --- a/src/mainboard/asus/p2b/devicetree.cb +++ b/src/mainboard/asus/p2b/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p3b-f/devicetree.cb b/src/mainboard/asus/p3b-f/devicetree.cb index 6fae008..f88a8f8 100644 --- a/src/mainboard/asus/p3b-f/devicetree.cb +++ b/src/mainboard/asus/p3b-f/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/avalue/eax-785e/devicetree.cb b/src/mainboard/avalue/eax-785e/devicetree.cb index bf58f90..a2ac9f4 100644 --- a/src/mainboard/avalue/eax-785e/devicetree.cb +++ b/src/mainboard/avalue/eax-785e/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1612 0x3060 inherit #TODO: Set the correctly subsystem id. chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -107,5 +107,5 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain end diff --git a/src/mainboard/axus/tc320/devicetree.cb b/src/mainboard/axus/tc320/devicetree.cb index 3c17690..970f71f 100644 --- a/src/mainboard/axus/tc320/devicetree.cb +++ b/src/mainboard/axus/tc320/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/azza/pt-6ibd/devicetree.cb b/src/mainboard/azza/pt-6ibd/devicetree.cb index 2448601..ce51b04 100644 --- a/src/mainboard/azza/pt-6ibd/devicetree.cb +++ b/src/mainboard/azza/pt-6ibd/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/bachmann/ot200/devicetree.cb b/src/mainboard/bachmann/ot200/devicetree.cb index 4a065cb..a49f267 100644 --- a/src/mainboard/bachmann/ot200/devicetree.cb +++ b/src/mainboard/bachmann/ot200/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/bcom/winnet100/devicetree.cb b/src/mainboard/bcom/winnet100/devicetree.cb index 20c117e..61a71e6 100644 --- a/src/mainboard/bcom/winnet100/devicetree.cb +++ b/src/mainboard/bcom/winnet100/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 0f.0 on end # Ethernet (onboard) diff --git a/src/mainboard/bcom/winnetp680/devicetree.cb b/src/mainboard/bcom/winnetp680/devicetree.cb index 3e31223..c324872 100644 --- a/src/mainboard/bcom/winnetp680/devicetree.cb +++ b/src/mainboard/bcom/winnetp680/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/bifferos/bifferboard/devicetree.cb b/src/mainboard/bifferos/bifferboard/devicetree.cb index 757ddd5..09dde33 100644 --- a/src/mainboard/bifferos/bifferboard/devicetree.cb +++ b/src/mainboard/bifferos/bifferboard/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/rdc/r8610 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/rdc/r8610 # Southbridge device pci 7.0 on end # SB diff --git a/src/mainboard/biostar/m6tba/devicetree.cb b/src/mainboard/biostar/m6tba/devicetree.cb index faeb73a..c92f8a6 100644 --- a/src/mainboard/biostar/m6tba/devicetree.cb +++ b/src/mainboard/biostar/m6tba/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index 6779a7a..5ad7cbf 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -118,7 +118,7 @@ chip northbridge/amd/amdk8/root_complex end
- end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb b/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb index a745126..4ddedfa 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb +++ b/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge device pci a.0 on end # NIC (onboard) diff --git a/src/mainboard/digitallogic/adl855pc/devicetree.cb b/src/mainboard/digitallogic/adl855pc/devicetree.cb index c514aca..9eeb95f 100644 --- a/src/mainboard/digitallogic/adl855pc/devicetree.cb +++ b/src/mainboard/digitallogic/adl855pc/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i855 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end device pci 1.0 on end chip southbridge/intel/i82801dx diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb index 9579b11..e43ebff 100644 --- a/src/mainboard/digitallogic/msm586seg/devicetree.cb +++ b/src/mainboard/digitallogic/msm586seg/devicetree.cb @@ -1,5 +1,5 @@ chip cpu/amd/sc520 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end device pci 12.0 on end # enet device pci 14.0 on end # 69000 diff --git a/src/mainboard/digitallogic/msm800sev/devicetree.cb b/src/mainboard/digitallogic/msm800sev/devicetree.cb index e00b36f..77dfbd0 100644 --- a/src/mainboard/digitallogic/msm800sev/devicetree.cb +++ b/src/mainboard/digitallogic/msm800sev/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/eaglelion/5bcm/devicetree.cb b/src/mainboard/eaglelion/5bcm/devicetree.cb index 94e8fab..33f1f90 100644 --- a/src/mainboard/eaglelion/5bcm/devicetree.cb +++ b/src/mainboard/eaglelion/5bcm/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530 device pci 12.0 on diff --git a/src/mainboard/ecs/p6iwp-fe/devicetree.cb b/src/mainboard/ecs/p6iwp-fe/devicetree.cb index d2b8249..180a2c9 100644 --- a/src/mainboard/ecs/p6iwp-fe/devicetree.cb +++ b/src/mainboard/ecs/p6iwp-fe/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/emulation/qemu-x86/devicetree.cb b/src/mainboard/emulation/qemu-x86/devicetree.cb index 50f4b11..ed64eef 100644 --- a/src/mainboard/emulation/qemu-x86/devicetree.cb +++ b/src/mainboard/emulation/qemu-x86/devicetree.cb @@ -1,5 +1,5 @@ chip mainboard/emulation/qemu-x86 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end
chip southbridge/intel/i82371eb # southbridge diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c index 6d73585..7c36c0a 100644 --- a/src/mainboard/emulation/qemu-x86/northbridge.c +++ b/src/mainboard/emulation/qemu-x86/northbridge.c @@ -138,7 +138,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index bdd959e..10870a6 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge # autodetect: #device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb index b5a4b5a..a258515 100644 --- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb index f84c7b3..0f3f201 100644 --- a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb index e1aac4e..0bf9307 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb +++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1039 0x1234 inherit chip northbridge/amd/amdk8 #mc0 device pci 18.0 on diff --git a/src/mainboard/gigabyte/m57sli/devicetree.cb b/src/mainboard/gigabyte/m57sli/devicetree.cb index 2184de5..197f1cb 100644 --- a/src/mainboard/gigabyte/m57sli/devicetree.cb +++ b/src/mainboard/gigabyte/m57sli/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end -device pci_domain 0 on # PCI domain +device domain 0 on # PCI domain subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/gigabyte/ma785gm/devicetree.cb b/src/mainboard/gigabyte/ma785gm/devicetree.cb index 47add73..49bfe2a 100644 --- a/src/mainboard/gigabyte/ma785gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma785gmt/devicetree.cb b/src/mainboard/gigabyte/ma785gmt/devicetree.cb index 124572f..c7c0ae1 100644 --- a/src/mainboard/gigabyte/ma785gmt/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gmt/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma78gm/devicetree.cb b/src/mainboard/gigabyte/ma78gm/devicetree.cb index 2fb4824..2fb0f1b 100644 --- a/src/mainboard/gigabyte/ma78gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma78gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb index d4e2ccd..6ab0f6f 100644 --- a/src/mainboard/google/butterfly/devicetree.cb +++ b/src/mainboard/google/butterfly/devicetree.cb @@ -33,7 +33,7 @@ chip northbridge/intel/sandybridge end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb index d93c021..0b18613 100644 --- a/src/mainboard/google/parrot/devicetree.cb +++ b/src/mainboard/google/parrot/devicetree.cb @@ -36,7 +36,7 @@ chip northbridge/intel/sandybridge end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller
diff --git a/src/mainboard/hp/dl145_g1/devicetree.cb b/src/mainboard/hp/dl145_g1/devicetree.cb index 0f4a34f..7ad1505 100644 --- a/src/mainboard/hp/dl145_g1/devicetree.cb +++ b/src/mainboard/hp/dl145_g1/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x7460 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 diff --git a/src/mainboard/hp/dl145_g3/devicetree.cb b/src/mainboard/hp/dl145_g3/devicetree.cb index 1f4f042..fee6dbd 100644 --- a/src/mainboard/hp/dl145_g3/devicetree.cb +++ b/src/mainboard/hp/dl145_g3/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 # northbridge device pci 18.0 on # devices on link 0 chip southbridge/broadcom/bcm21000 # HT2100 @@ -81,7 +81,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end # amdk8
- end #pci_domain + end #domain end
diff --git a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb index 3c1302b..1da52ef 100644 --- a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb +++ b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdfam10 # northbridge device pci 18.0 on end device pci 18.0 on end @@ -84,7 +84,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end end # amdfam10
- end #pci_domain + end #domain end
diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb index 4a65844..0f1474b 100644 --- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb +++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index 3fbe863..0d92bdb 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/ibm/e325/devicetree.cb b/src/mainboard/ibm/e325/devicetree.cb index 331e632..9654b3f 100644 --- a/src/mainboard/ibm/e325/devicetree.cb +++ b/src/mainboard/ibm/e325/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 device pci 18.0 on # LDT 1 diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb index 8826439..785f357 100644 --- a/src/mainboard/ibm/e326/devicetree.cb +++ b/src/mainboard/ibm/e326/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end
- device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 device pci 18.0 on # LDT 1 diff --git a/src/mainboard/iei/juki-511p/devicetree.cb b/src/mainboard/iei/juki-511p/devicetree.cb index 8592c09..4706ff5 100644 --- a/src/mainboard/iei/juki-511p/devicetree.cb +++ b/src/mainboard/iei/juki-511p/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530
diff --git a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb index 06d2d32..0195822 100644 --- a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb +++ b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge chip southbridge/amd/rs780 @@ -66,6 +66,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.2 on end device pci 18.3 on end end - end #pci_domain + end #domain end #root_complex
diff --git a/src/mainboard/iei/nova4899r/devicetree.cb b/src/mainboard/iei/nova4899r/devicetree.cb index 8055fb1..f27662e 100644 --- a/src/mainboard/iei/nova4899r/devicetree.cb +++ b/src/mainboard/iei/nova4899r/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5530 device pci 0a.0 on end # ETH0 diff --git a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb index 2d37ecf..5360fcc 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb +++ b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/iei/pm-lx-800-r11/devicetree.cb b/src/mainboard/iei/pm-lx-800-r11/devicetree.cb index c277606..2bb840e 100644 --- a/src/mainboard/iei/pm-lx-800-r11/devicetree.cb +++ b/src/mainboard/iei/pm-lx-800-r11/devicetree.cb @@ -20,7 +20,7 @@ ##
chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Video Adapter device pci 1.2 on end # AES Security Block diff --git a/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb b/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb index ff60894..5b6d73a 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb +++ b/src/mainboard/iei/pm-lx2-800-r10/devicetree.cb @@ -20,7 +20,7 @@ ##
chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Video Adapter device pci 1.2 on end # AES Security Block diff --git a/src/mainboard/intel/d810e2cb/devicetree.cb b/src/mainboard/intel/d810e2cb/devicetree.cb index 4129336..f5afa92 100644 --- a/src/mainboard/intel/d810e2cb/devicetree.cb +++ b/src/mainboard/intel/d810e2cb/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end # Chipset Graphics Controller (CGC) chip southbridge/intel/i82801bx # Southbridge diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index a58d99e..6a4b353 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -25,7 +25,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x464c inherit device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/intel/eagleheights/devicetree.cb b/src/mainboard/intel/eagleheights/devicetree.cb index 9971264..5a272c1 100644 --- a/src/mainboard/intel/eagleheights/devicetree.cb +++ b/src/mainboard/intel/eagleheights/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status device pci 01.0 on end # IMCH EDMA engine diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index 686fe2e..1d0ed42 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/sandybridge end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller
diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb index fb32a08..b5c3ece 100644 --- a/src/mainboard/intel/jarrell/devicetree.cb +++ b/src/mainboard/intel/jarrell/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x1079 inherit device pci 00.0 on end device pci 00.1 on end diff --git a/src/mainboard/intel/mtarvon/devicetree.cb b/src/mainboard/intel/mtarvon/devicetree.cb index cd7df2d..61ead86 100644 --- a/src/mainboard/intel/mtarvon/devicetree.cb +++ b/src/mainboard/intel/mtarvon/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb index 486601a..23e98d3 100644 --- a/src/mainboard/intel/truxton/devicetree.cb +++ b/src/mainboard/intel/truxton/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i3100 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2680 inherit device pci 00.0 on end # IMCH device pci 00.1 on end # IMCH error status diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb index 18ee64e..75d918e 100644 --- a/src/mainboard/intel/xe7501devkit/devicetree.cb +++ b/src/mainboard/intel/xe7501devkit/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7501 - device pci_domain 0 on + device domain 0 on subsystemid 0x8086 0x2480 inherit device pci 0.0 on end # Chipset host controller device pci 0.1 on end # Host RASUM controller @@ -61,7 +61,7 @@ chip northbridge/intel/e7501 device pci 1f.5 off end # AC97 Audio device pci 1f.6 off end # AC97 Modem end # SB - end # PCI_DOMAIN + end # PCI domain device lapic_cluster 0 on chip cpu/intel/socket_mPGA604 device lapic 0 on end diff --git a/src/mainboard/iwave/iWRainbowG6/devicetree.cb b/src/mainboard/iwave/iWRainbowG6/devicetree.cb index efae82b..7c46a8f 100644 --- a/src/mainboard/iwave/iWRainbowG6/devicetree.cb +++ b/src/mainboard/iwave/iWRainbowG6/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/sch end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # Integrated Graphics and Video Device
diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb index d0cff02..3f9bbce 100644 --- a/src/mainboard/iwill/dk8_htx/devicetree.cb +++ b/src/mainboard/iwill/dk8_htx/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end @@ -113,7 +113,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end
- end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/iwill/dk8s2/devicetree.cb b/src/mainboard/iwill/dk8s2/devicetree.cb index f234c35..0220c30 100644 --- a/src/mainboard/iwill/dk8s2/devicetree.cb +++ b/src/mainboard/iwill/dk8s2/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x161f 0x3016 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT 0 diff --git a/src/mainboard/iwill/dk8x/devicetree.cb b/src/mainboard/iwill/dk8x/devicetree.cb index 3888805..5604d7f 100644 --- a/src/mainboard/iwill/dk8x/devicetree.cb +++ b/src/mainboard/iwill/dk8x/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/jetway/j7f24/devicetree.cb b/src/mainboard/jetway/j7f24/devicetree.cb index 16dd2f6..ace3277 100644 --- a/src/mainboard/jetway/j7f24/devicetree.cb +++ b/src/mainboard/jetway/j7f24/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/jetway/pa78vm5/devicetree.cb b/src/mainboard/jetway/pa78vm5/devicetree.cb index 6913d79..116e7b5 100644 --- a/src/mainboard/jetway/pa78vm5/devicetree.cb +++ b/src/mainboard/jetway/pa78vm5/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -104,7 +104,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63
end diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index b848d40..ee738b2 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb index 68741ae..dc4945b 100644 --- a/src/mainboard/kontron/kt690/devicetree.cb +++ b/src/mainboard/kontron/kt690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1488 0x6900 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -121,6 +121,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/lanner/em8510/devicetree.cb b/src/mainboard/lanner/em8510/devicetree.cb index 5f17fba..a7b43fd 100644 --- a/src/mainboard/lanner/em8510/devicetree.cb +++ b/src/mainboard/lanner/em8510/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/i855 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/intel/i82801dx # pci 11.0 on end diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index f8ba137..7bde52f 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2015 end diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 2f0a179..d5d5274 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2017 end diff --git a/src/mainboard/lippert/frontrunner/devicetree.cb b/src/mainboard/lippert/frontrunner/devicetree.cb index 63ac140..7046158 100644 --- a/src/mainboard/lippert/frontrunner/devicetree.cb +++ b/src/mainboard/lippert/frontrunner/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/gx2 end end
- device pci_domain 0 on + device domain 0 on device pci 0.0 on end chip southbridge/amd/cs5535 register "setupflash" = "0" diff --git a/src/mainboard/lippert/hurricane-lx/devicetree.cb b/src/mainboard/lippert/hurricane-lx/devicetree.cb index 5aa4cd4..98e0744 100644 --- a/src/mainboard/lippert/hurricane-lx/devicetree.cb +++ b/src/mainboard/lippert/hurricane-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/literunner-lx/devicetree.cb b/src/mainboard/lippert/literunner-lx/devicetree.cb index b142471..65119fc 100644 --- a/src/mainboard/lippert/literunner-lx/devicetree.cb +++ b/src/mainboard/lippert/literunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/roadrunner-lx/devicetree.cb b/src/mainboard/lippert/roadrunner-lx/devicetree.cb index 73d1d88..f3bd588 100644 --- a/src/mainboard/lippert/roadrunner-lx/devicetree.cb +++ b/src/mainboard/lippert/roadrunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/lippert/spacerunner-lx/devicetree.cb b/src/mainboard/lippert/spacerunner-lx/devicetree.cb index 4bb1508..a4edbe8 100644 --- a/src/mainboard/lippert/spacerunner-lx/devicetree.cb +++ b/src/mainboard/lippert/spacerunner-lx/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics device pci 1.2 on end # AES diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb index df2d2ce..4e995d9 100644 --- a/src/mainboard/mitac/6513wu/devicetree.cb +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/msi/ms6119/devicetree.cb b/src/mainboard/msi/ms6119/devicetree.cb index d5be59f..6829a3a 100644 --- a/src/mainboard/msi/ms6119/devicetree.cb +++ b/src/mainboard/msi/ms6119/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6147/devicetree.cb b/src/mainboard/msi/ms6147/devicetree.cb index 0500a7f..3792e21 100644 --- a/src/mainboard/msi/ms6147/devicetree.cb +++ b/src/mainboard/msi/ms6147/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6156/devicetree.cb b/src/mainboard/msi/ms6156/devicetree.cb index da3ba6f..e038513 100644 --- a/src/mainboard/msi/ms6156/devicetree.cb +++ b/src/mainboard/msi/ms6156/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index 569aee5..c91ea0a 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/msi/ms7135/devicetree.cb b/src/mainboard/msi/ms7135/devicetree.cb index 54e5d5e..9546acd 100644 --- a/src/mainboard/msi/ms7135/devicetree.cb +++ b/src/mainboard/msi/ms7135/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end
- device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x7135 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms7260/devicetree.cb b/src/mainboard/msi/ms7260/devicetree.cb index 47d5381..fe320ec 100644 --- a/src/mainboard/msi/ms7260/devicetree.cb +++ b/src/mainboard/msi/ms7260/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x7260 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 9576225..b41a162 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 device pci 18.0 on end @@ -81,7 +81,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end # amdk8 - end #pci_domain + end #domain # chip drivers/generic/debug # device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index b52e7ed..8b46deb 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x9282 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/msi/ms9652_fam10/devicetree.cb b/src/mainboard/msi/ms9652_fam10/devicetree.cb index 0e9a3ff..4060ae5 100644 --- a/src/mainboard/msi/ms9652_fam10/devicetree.cb +++ b/src/mainboard/msi/ms9652_fam10/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1462 0x9652 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on # Link 0 diff --git a/src/mainboard/nec/powermate2000/devicetree.cb b/src/mainboard/nec/powermate2000/devicetree.cb index 37a15e1..daa7551 100644 --- a/src/mainboard/nec/powermate2000/devicetree.cb +++ b/src/mainboard/nec/powermate2000/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82810 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 off end # Onboard video chip southbridge/intel/i82801ax # Southbridge diff --git a/src/mainboard/newisys/khepri/devicetree.cb b/src/mainboard/newisys/khepri/devicetree.cb index 9cdbc9c..cc6e9b7 100644 --- a/src/mainboard/newisys/khepri/devicetree.cb +++ b/src/mainboard/newisys/khepri/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x17c2 0x0010 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT 0 diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb index f89d1cd..6d109cc 100644 --- a/src/mainboard/nokia/ip530/devicetree.cb +++ b/src/mainboard/nokia/ip530/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/nvidia/l1_2pvv/devicetree.cb b/src/mainboard/nvidia/l1_2pvv/devicetree.cb index 9a80710..fff1f6a 100644 --- a/src/mainboard/nvidia/l1_2pvv/devicetree.cb +++ b/src/mainboard/nvidia/l1_2pvv/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb index 91d9350..8e0ece0 100644 --- a/src/mainboard/pcengines/alix1c/devicetree.cb +++ b/src/mainboard/pcengines/alix1c/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb index 836ba35..9732796 100644 --- a/src/mainboard/pcengines/alix2d/devicetree.cb +++ b/src/mainboard/pcengines/alix2d/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 diff --git a/src/mainboard/rca/rm4100/devicetree.cb b/src/mainboard/rca/rm4100/devicetree.cb index 5c22eaa..7fb73e1 100644 --- a/src/mainboard/rca/rm4100/devicetree.cb +++ b/src/mainboard/rca/rm4100/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i82830 # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801dx # Southbridge diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index aadba9d..502b032 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i945 end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x4352 0x6886 inherit device pci 00.0 on end # host bridge # auto detection: diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 002f595..192681e 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -16,7 +16,7 @@ chip northbridge/intel/gm45 end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x4352 0x8986 device pci 00.0 on end # host bridge device pci 02.0 on # VGA diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index 7a2ee6c..c2f091d 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -32,7 +32,7 @@ chip northbridge/intel/sandybridge end end
- device pci_domain 0 on + device domain 0 on ioapic_irq 4 INTA 0x10 ioapic_irq 4 INTB 0x11 ioapic_irq 4 INTC 0x12 diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index b59dcb2..925b71d 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/sandybridge end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb index 6f068e4..d01d5a8 100644 --- a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb +++ b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x110a 0x4076 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -130,6 +130,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb index 03451e2..c39a2ce 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb +++ b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb index f355200..fe5bf33 100644 --- a/src/mainboard/sunw/ultra40/devicetree.cb +++ b/src/mainboard/sunw/ultra40/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x108e 0x0040 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb index 73a43e8..0c8cf61 100644 --- a/src/mainboard/supermicro/h8dme/devicetree.cb +++ b/src/mainboard/supermicro/h8dme/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb index 6c96ac0..3d1e994 100644 --- a/src/mainboard/supermicro/h8dmr/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb index 6c4443f..e7fe9e4 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8qgi/devicetree.cb b/src/mainboard/supermicro/h8qgi/devicetree.cb index 48797d5..8365346 100644 --- a/src/mainboard/supermicro/h8qgi/devicetree.cb +++ b/src/mainboard/supermicro/h8qgi/devicetree.cb @@ -23,7 +23,7 @@ chip northbridge/amd/agesa/family15/root_complex #device lapic 0x10 on end #f10 end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #SuperMicro chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -125,6 +125,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex
diff --git a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb index 56ba7b5..d797bea 100644 --- a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/supermicro/h8scm/devicetree.cb b/src/mainboard/supermicro/h8scm/devicetree.cb index 5ade0af..6367392 100644 --- a/src/mainboard/supermicro/h8scm/devicetree.cb +++ b/src/mainboard/supermicro/h8scm/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x10 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #Supermicro chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -122,6 +122,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex
diff --git a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb index 9aa4406..eb7ae1b 100644 --- a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb @@ -9,7 +9,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x1511 inherit chip northbridge/amd/amdfam10 ##device pci 18.0 on end @@ -104,9 +104,9 @@ chip northbridge/amd/amdfam10/root_complex device pci 19.3 on end device pci 19.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 -# device pci_domain 0 on +# device domain 0 on # chip northbridge/amd/amdfam10 # device pci 00.0 on end# northbridge # device pci 00.0 on end @@ -118,7 +118,7 @@ chip northbridge/amd/amdfam10/root_complex # device pci 00.4 on end # device pci 00.5 on end # end -# end #pci_domain +# end #domain
# chip drivers/generic/debug # device pnp 0.0 off end # chip name diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb index e6201a8..f39ca6c 100644 --- a/src/mainboard/supermicro/x6dai_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dai_g/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7525 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6780 inherit chip southbridge/intel/esb6300 # esb6300 register "pirq_a_d" = "0x0b0a0a05" diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb index 08c0751..dfe2e88 100644 --- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.2 off end device pnp 00.3 off end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/esb6300 # ESB6300 register "pirq_a_d" = "0x0b070a05" diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb index ecfe0a0..c074fe8 100644 --- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.2 off end device pnp 00.3 off end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x6080 inherit chip southbridge/intel/i82801ex # ICH5R register "pirq_a_d" = "0x0b070a05" diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb index 6ada3b1..1b54204 100644 --- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb index 3d9b644..1ec6639 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0x5580 inherit chip southbridge/intel/i82801ex # i82801er # USB ports diff --git a/src/mainboard/supermicro/x7db8/devicetree.cb b/src/mainboard/supermicro/x7db8/devicetree.cb index 8949c54..0a3fabb 100644 --- a/src/mainboard/supermicro/x7db8/devicetree.cb +++ b/src/mainboard/supermicro/x7db8/devicetree.cb @@ -28,7 +28,7 @@ chip northbridge/intel/i5000 end end
- device pci_domain 0 on + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x15d9 0x2017 end diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb index 148a4ab..2cc73e1 100644 --- a/src/mainboard/technexion/tim5690/devicetree.cb +++ b/src/mainboard/technexion/tim5690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -108,6 +108,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb index e1f8936..ee69a49 100644 --- a/src/mainboard/technexion/tim8690/devicetree.cb +++ b/src/mainboard/technexion/tim8690/devicetree.cb @@ -14,7 +14,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3050 inherit chip northbridge/amd/amdk8 device pci 18.0 on # southbridge @@ -111,6 +111,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end #northbridge/amd/amdk8 - end #pci_domain + end #domain end #northbridge/amd/amdk8/root_complex
diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb index 9fddf73..6c83e20 100644 --- a/src/mainboard/technologic/ts5300/devicetree.cb +++ b/src/mainboard/technologic/ts5300/devicetree.cb @@ -1,5 +1,5 @@ chip cpu/amd/sc520 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end end
diff --git a/src/mainboard/televideo/tc7020/devicetree.cb b/src/mainboard/televideo/tc7020/devicetree.cb index 10188a3..d1fa6bd 100644 --- a/src/mainboard/televideo/tc7020/devicetree.cb +++ b/src/mainboard/televideo/tc7020/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/gx1 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge chip southbridge/amd/cs5530 # Southbridge device pci 12.0 on # ISA bridge diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb index f7b11f1..c173330 100644 --- a/src/mainboard/thomson/ip1000/devicetree.cb +++ b/src/mainboard/thomson/ip1000/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/intel/i82830 # Northbridge end end
- device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801dx # Southbridge diff --git a/src/mainboard/traverse/geos/devicetree.cb b/src/mainboard/traverse/geos/devicetree.cb index 44b36f6..ef14c3e 100644 --- a/src/mainboard/traverse/geos/devicetree.cb +++ b/src/mainboard/traverse/geos/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/tyan/s1846/devicetree.cb b/src/mainboard/tyan/s1846/devicetree.cb index d3df17c..16b3e7c 100644 --- a/src/mainboard/tyan/s1846/devicetree.cb +++ b/src/mainboard/tyan/s1846/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index c0557f8..726a5d2 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/intel/e7501 - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2735 inherit device pci 0.0 on end device pci 0.1 on end @@ -73,7 +73,7 @@ chip northbridge/intel/e7501 device pci 1f.5 off end device pci 1f.6 off end end # SB - end # PCI_DOMAIN + end # PCI domain device lapic_cluster 0 on chip cpu/intel/socket_mPGA604 device lapic 0 on end diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 4e981ad..bff0013 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2850 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index d3d6c6d..f7f7a9e 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2875 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index b815fb5..2aa0796 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2880 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index 7e836ff..463c553 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2881 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index 4f10752..0726d08 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2882 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge @@ -121,6 +121,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.2 on end device pci 18.3 on end end # NB - end #pci_domain + end #domain end
diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index fbb9680..b677fbc 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x2885 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 @@ -118,7 +118,7 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end
- end #pci_domain + end #domain
# chip drivers/generic/debug # device pnp 0.0 off end diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb index d793640..7517e4d 100644 --- a/src/mainboard/tyan/s2891/devicetree.cb +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2891 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb index 3b999ca..a5cef44 100644 --- a/src/mainboard/tyan/s2892/devicetree.cb +++ b/src/mainboard/tyan/s2892/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2892 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb index 7d7abc3..f60d5c6 100644 --- a/src/mainboard/tyan/s2895/devicetree.cb +++ b/src/mainboard/tyan/s2895/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2895 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2912/devicetree.cb b/src/mainboard/tyan/s2912/devicetree.cb index 0ce4a48..276e12f 100644 --- a/src/mainboard/tyan/s2912/devicetree.cb +++ b/src/mainboard/tyan/s2912/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb index 43bdeb6..851da92 100644 --- a/src/mainboard/tyan/s2912_fam10/devicetree.cb +++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index e1aa23a..37470d8 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end
- device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x4880 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 @@ -94,6 +94,6 @@ chip northbridge/amd/amdk8/root_complex device pci 18.3 on end end
- end #pci_domain + end #domain end
diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index 767def9..eaf2e57 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x10f1 0x4882 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 diff --git a/src/mainboard/tyan/s8226/devicetree.cb b/src/mainboard/tyan/s8226/devicetree.cb index a057f02..ce367a8 100644 --- a/src/mainboard/tyan/s8226/devicetree.cb +++ b/src/mainboard/tyan/s8226/devicetree.cb @@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family15/root_complex device lapic 0x10 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x15d9 0xab11 inherit #Tyan chip northbridge/amd/agesa/family15 # CPU side of HT root complex device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology @@ -122,6 +122,6 @@ chip northbridge/amd/agesa/family15/root_complex device pci 18.4 on end device pci 18.5 on end #f15 end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex - end #pci_domain + end #domain end #northbridge/amd/agesa/family15/root_complex
diff --git a/src/mainboard/via/epia-cn/devicetree.cb b/src/mainboard/via/epia-cn/devicetree.cb index 96a2222..041bc40 100644 --- a/src/mainboard/via/epia-cn/devicetree.cb +++ b/src/mainboard/via/epia-cn/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia-m/devicetree.cb b/src/mainboard/via/epia-m/devicetree.cb index 3db72ee..eae67c3 100644 --- a/src/mainboard/via/epia-m/devicetree.cb +++ b/src/mainboard/via/epia-m/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/via/vt8623 end end
- device pci_domain 0 on + device domain 0 on
device pci 0.0 on end device pci 1.0 on end diff --git a/src/mainboard/via/epia-m700/devicetree.cb b/src/mainboard/via/epia-m700/devicetree.cb index a687f09..55c7cdf 100644 --- a/src/mainboard/via/epia-m700/devicetree.cb +++ b/src/mainboard/via/epia-m700/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/vx800 # Northbridge - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia-n/devicetree.cb b/src/mainboard/via/epia-n/devicetree.cb index 3505374..d0117ef 100644 --- a/src/mainboard/via/epia-n/devicetree.cb +++ b/src/mainboard/via/epia-n/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/via/cn400 # Northbridge end end
- device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/via/epia/devicetree.cb b/src/mainboard/via/epia/devicetree.cb index c906074..b0acb3a 100644 --- a/src/mainboard/via/epia/devicetree.cb +++ b/src/mainboard/via/epia/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/vt8601 - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # Northbridge # device pci 0.1 on # AGP bridge # device pci 0.0 on end # Integrated VGA diff --git a/src/mainboard/via/pc2500e/devicetree.cb b/src/mainboard/via/pc2500e/devicetree.cb index bb3ddcc..34a673b 100644 --- a/src/mainboard/via/pc2500e/devicetree.cb +++ b/src/mainboard/via/pc2500e/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/via/cn700 # Northbridge - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain subsystemid 0x1019 0xaa51 inherit device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb index ab09071..5268b17 100644 --- a/src/mainboard/via/vt8454c/devicetree.cb +++ b/src/mainboard/via/vt8454c/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/via/cx700 device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control diff --git a/src/mainboard/winent/pl6064/devicetree.cb b/src/mainboard/winent/pl6064/devicetree.cb index 82fd21e..8682109 100644 --- a/src/mainboard/winent/pl6064/devicetree.cb +++ b/src/mainboard/winent/pl6064/devicetree.cb @@ -1,5 +1,5 @@ chip northbridge/amd/lx - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Northbridge device pci 1.1 on end # Graphics chip southbridge/amd/cs5536 diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb index cb30e43..9055ef6 100644 --- a/src/mainboard/wyse/s50/devicetree.cb +++ b/src/mainboard/wyse/s50/devicetree.cb @@ -20,7 +20,7 @@ ##
chip northbridge/amd/gx2 - device pci_domain 0 on + device domain 0 on device pci 1.0 on end # Geode GX2 Host Bridge device pci 1.1 on end # Geode GX2 Graphics Processor chip southbridge/amd/cs5536 diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index c5d570a..59a12f1 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -1244,7 +1244,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -1260,7 +1260,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1446,7 +1446,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 9c598e8..e860594 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -921,7 +921,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 3d0b97f..d955bcf 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -345,7 +345,7 @@ static void nb_read_resources(device_t dev) }
/* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -908,7 +908,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 1ac7e61..769d473 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -343,7 +343,7 @@ static void nb_read_resources(device_t dev) }
/* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -938,7 +938,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -953,7 +953,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1143,7 +1143,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 2ff5c1a..41c2d8e 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -339,7 +339,7 @@ static void nb_read_resources(device_t dev) }
/* - * This MMCONF resource must be reserved in the PCI_DOMAIN. + * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ @@ -922,7 +922,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -937,7 +937,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if (pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if (pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1123,7 +1123,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 77dd138..3b1e1f5 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -1280,7 +1280,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if(dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if(pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); @@ -1296,7 +1296,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) if (dev_mc && dev_mc->bus) { printk(BIOS_DEBUG, "%s found\n", dev_path(dev_mc)); pci_domain = dev_mc->bus->dev; - if(pci_domain && (pci_domain->path.type == DEVICE_PATH_PCI_DOMAIN)) { + if(pci_domain && (pci_domain->path.type == DEVICE_PATH_DOMAIN)) { if((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); dev_mc->bus->secondary = CONFIG_CBB; // move to 0xff @@ -1469,7 +1469,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 2f3d778..c5859f0 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -1355,7 +1355,7 @@ static void root_complex_enable_dev(struct device *dev) }
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c index 83b84e3..8df0427 100644 --- a/src/northbridge/amd/gx1/northbridge.c +++ b/src/northbridge/amd/gx1/northbridge.c @@ -154,8 +154,8 @@ static void enable_dev(struct device *dev) { printk(BIOS_SPEW, "%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { - printk(BIOS_SPEW, "DEVICE_PATH_PCI_DOMAIN\n"); + if (dev->path.type == DEVICE_PATH_DOMAIN) { + printk(BIOS_SPEW, "DEVICE_PATH_DOMAIN\n"); dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index 80bcdf6..8b8ef71 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -349,7 +349,7 @@ static void enable_dev(struct device *dev) __func__, dev->path.type);
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c index aaaf46b..26b4884 100644 --- a/src/northbridge/amd/lx/northbridge.c +++ b/src/northbridge/amd/lx/northbridge.c @@ -453,7 +453,7 @@ static void enable_dev(struct device *dev) __func__, dev->path.type);
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (dev->path.type == DEVICE_PATH_DOMAIN) dev->ops = &pci_domain_ops; else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c index e7d7d5d..60929aa 100644 --- a/src/northbridge/intel/e7501/northbridge.c +++ b/src/northbridge/intel/e7501/northbridge.c @@ -125,7 +125,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index db0ece2..00b8f57 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -137,7 +137,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c index 962e8cd..536ceba 100644 --- a/src/northbridge/intel/e7520/northbridge.c +++ b/src/northbridge/intel/e7520/northbridge.c @@ -200,7 +200,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c index ceb7afa..f854913 100644 --- a/src/northbridge/intel/e7525/northbridge.c +++ b/src/northbridge/intel/e7525/northbridge.c @@ -200,7 +200,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 1839ec6..e1e2b92 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -233,7 +233,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c index d90d0b5..ee8d536 100644 --- a/src/northbridge/intel/i3100/northbridge.c +++ b/src/northbridge/intel/i3100/northbridge.c @@ -221,7 +221,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index ccd5e9c..5f8bd7b 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -107,7 +107,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c index c75a4bb..c2c50ce 100644 --- a/src/northbridge/intel/i440lx/northbridge.c +++ b/src/northbridge/intel/i440lx/northbridge.c @@ -136,7 +136,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c index 071616c..01d6945 100644 --- a/src/northbridge/intel/i5000/northbridge.c +++ b/src/northbridge/intel/i5000/northbridge.c @@ -183,7 +183,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index ed9876f..40d8df8 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -160,7 +160,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c index f2505bd..194bacb 100644 --- a/src/northbridge/intel/i82830/northbridge.c +++ b/src/northbridge/intel/i82830/northbridge.c @@ -129,7 +129,7 @@ static void enable_dev(struct device *dev) struct device_path;
/* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c index b1e150f..68fefca 100644 --- a/src/northbridge/intel/i855/northbridge.c +++ b/src/northbridge/intel/i855/northbridge.c @@ -144,7 +144,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index c6c93e5..ab5048e 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -305,7 +305,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 8652838..0f5492d 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -501,7 +501,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index fe5881c..33a74b5 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -323,7 +323,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(device_t dev) { /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { dev->ops = &cpu_bus_ops; diff --git a/src/northbridge/rdc/r8610/northbridge.c b/src/northbridge/rdc/r8610/northbridge.c index ebcccff..622b056 100644 --- a/src/northbridge/rdc/r8610/northbridge.c +++ b/src/northbridge/rdc/r8610/northbridge.c @@ -121,7 +121,7 @@ static struct device_operations pci_domain_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c index ab9f084..d126596 100644 --- a/src/northbridge/via/cn400/northbridge.c +++ b/src/northbridge/via/cn400/northbridge.c @@ -265,7 +265,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "CN400: enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index 86c11a8..ec038e0 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -185,7 +185,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In cn700 enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index ce5edf8..b1e9140 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -115,7 +115,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Our wonderful device model */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c index 950d683..1c699ee 100644 --- a/src/northbridge/via/vt8601/northbridge.c +++ b/src/northbridge/via/vt8601/northbridge.c @@ -129,7 +129,7 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index e061155..782583d 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -191,7 +191,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In vt8623 enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c index 4e0a36d..1a438b0 100644 --- a/src/northbridge/via/vx800/northbridge.c +++ b/src/northbridge/via/vx800/northbridge.c @@ -163,7 +163,7 @@ static void enable_dev(struct device *dev) printk(BIOS_SPEW, "In VX800 enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { diff --git a/src/southbridge/nvidia/ck804/pci.c b/src/southbridge/nvidia/ck804/pci.c index c29ed10..51fb7cd 100644 --- a/src/southbridge/nvidia/ck804/pci.c +++ b/src/southbridge/nvidia/ck804/pci.c @@ -52,7 +52,7 @@ static void pci_init(struct device *dev)
pci_domain_dev = dev->bus->dev; while (pci_domain_dev) { - if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (pci_domain_dev->path.type == DEVICE_PATH_DOMAIN) break; pci_domain_dev = pci_domain_dev->bus->dev; } diff --git a/src/southbridge/nvidia/mcp55/pci.c b/src/southbridge/nvidia/mcp55/pci.c index 2ea7daf..d2700d1 100644 --- a/src/southbridge/nvidia/mcp55/pci.c +++ b/src/southbridge/nvidia/mcp55/pci.c @@ -58,7 +58,7 @@ static void pci_init(struct device *dev)
pci_domain_dev = dev->bus->dev; while (pci_domain_dev) { - if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) + if (pci_domain_dev->path.type == DEVICE_PATH_DOMAIN) break; pci_domain_dev = pci_domain_dev->bus->dev; } diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index 215da56..70d6f2e 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -377,21 +377,21 @@ struct yy_trans_info flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static yyconst flex_int16_t yy_accept[116] = +static yyconst flex_int16_t yy_accept[114] = { 0, 0, 0, 31, 29, 1, 3, 29, 29, 29, 25, 25, 23, 26, 29, 26, 26, 26, 29, 29, 29, 29, 29, 29, 29, 1, 3, 29, 0, 29, 0, 2, 25, 26, 29, 29, 29, 26, 29, 29, 29, - 29, 18, 29, 29, 29, 7, 29, 29, 29, 29, - 28, 28, 24, 29, 29, 29, 17, 22, 12, 29, - 29, 16, 29, 8, 9, 11, 29, 29, 27, 4, - 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, - 13, 29, 29, 29, 5, 29, 10, 29, 29, 29, - 29, 20, 29, 29, 29, 29, 29, 29, 29, 29, - - 6, 29, 29, 29, 29, 29, 19, 29, 15, 29, - 29, 21, 29, 14, 0 + 29, 29, 18, 29, 29, 29, 7, 29, 29, 29, + 29, 28, 28, 24, 29, 29, 29, 29, 17, 22, + 12, 29, 29, 16, 29, 8, 9, 11, 29, 29, + 27, 4, 29, 29, 29, 29, 29, 29, 29, 29, + 29, 29, 29, 13, 29, 29, 5, 15, 29, 10, + 29, 29, 29, 20, 29, 29, 29, 29, 29, 29, + + 6, 29, 29, 29, 29, 19, 29, 29, 29, 21, + 29, 14, 0 } ;
static yyconst flex_int32_t yy_ec[256] = @@ -434,94 +434,94 @@ static yyconst flex_int32_t yy_meta[39] = 1, 1, 1, 1, 1, 1, 1, 1 } ;
-static yyconst flex_int16_t yy_base[121] = +static yyconst flex_int16_t yy_base[119] = { 0, - 0, 0, 181, 0, 178, 182, 176, 37, 41, 38, - 141, 0, 44, 163, 54, 58, 61, 45, 159, 53, - 52, 154, 139, 0, 171, 182, 80, 167, 84, 168, - 182, 0, 84, 87, 155, 144, 93, 137, 147, 147, - 141, 147, 132, 132, 139, 0, 135, 129, 135, 139, - 0, 182, 0, 145, 125, 129, 0, 0, 0, 132, - 122, 0, 126, 0, 134, 0, 124, 115, 0, 0, - 128, 114, 120, 125, 123, 109, 103, 119, 114, 119, - 112, 98, 92, 92, 0, 90, 107, 103, 94, 99, - 85, 0, 93, 91, 99, 83, 93, 81, 77, 86, - - 0, 83, 72, 64, 60, 59, 0, 42, 0, 52, - 43, 0, 16, 0, 182, 40, 129, 131, 133, 135 + 0, 0, 179, 0, 176, 180, 174, 37, 41, 38, + 139, 0, 44, 161, 54, 72, 57, 39, 157, 47, + 54, 152, 137, 0, 169, 180, 81, 165, 74, 166, + 180, 0, 80, 98, 153, 142, 87, 139, 134, 144, + 144, 138, 144, 129, 129, 136, 0, 132, 126, 132, + 136, 0, 180, 0, 142, 122, 126, 133, 0, 0, + 0, 128, 118, 0, 122, 0, 0, 0, 121, 112, + 0, 0, 125, 118, 110, 116, 121, 106, 100, 116, + 108, 110, 115, 117, 98, 89, 0, 0, 87, 98, + 94, 91, 77, 0, 83, 77, 70, 79, 67, 63, + + 0, 70, 61, 58, 65, 0, 40, 52, 49, 0, + 22, 0, 180, 40, 123, 125, 127, 129 } ;
-static yyconst flex_int16_t yy_def[121] = +static yyconst flex_int16_t yy_def[119] = { 0, - 115, 1, 115, 116, 115, 115, 116, 117, 118, 116, - 10, 116, 10, 116, 10, 10, 10, 116, 116, 116, - 116, 116, 116, 116, 115, 115, 117, 119, 118, 120, - 115, 10, 10, 10, 116, 116, 10, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 116, 115, 34, 116, 116, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - - 116, 116, 116, 116, 116, 116, 116, 116, 116, 116, - 116, 116, 116, 116, 0, 115, 115, 115, 115, 115 + 113, 1, 113, 114, 113, 113, 114, 115, 116, 114, + 10, 114, 10, 114, 10, 10, 10, 114, 114, 114, + 114, 114, 114, 114, 113, 113, 115, 117, 116, 118, + 113, 10, 10, 10, 114, 114, 10, 114, 114, 114, + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + 114, 114, 113, 34, 114, 114, 114, 114, 114, 114, + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + + 114, 114, 114, 114, 114, 114, 114, 114, 114, 114, + 114, 114, 0, 113, 113, 113, 113, 113 } ;
-static yyconst flex_int16_t yy_nxt[221] = +static yyconst flex_int16_t yy_nxt[219] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, 13, 13, 14, 4, 4, 4, 13, 13, 15, 16, 17, 13, 4, 4, 18, 19, 4, 4, 20, 21, 4, 22, 23, 4, 4, 4, 4, 4, 28, 28, - 24, 24, 30, 31, 32, 32, 32, 114, 33, 33, - 33, 33, 33, 40, 33, 33, 33, 33, 33, 33, - 33, 33, 33, 113, 33, 33, 33, 33, 33, 33, - 47, 112, 41, 42, 45, 111, 43, 36, 37, 48, - 46, 28, 28, 110, 51, 30, 31, 109, 39, 38, - 33, 33, 33, 53, 53, 53, 108, 53, 53, 33, - - 33, 33, 107, 53, 53, 53, 53, 53, 53, 106, - 105, 104, 103, 102, 101, 100, 99, 98, 97, 96, - 95, 94, 93, 92, 91, 90, 89, 88, 56, 27, - 27, 29, 29, 28, 28, 30, 30, 87, 86, 85, - 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, - 74, 73, 72, 71, 70, 69, 68, 67, 66, 65, - 64, 63, 62, 61, 60, 59, 58, 57, 55, 54, - 31, 52, 25, 50, 49, 44, 35, 34, 26, 25, - 115, 3, 115, 115, 115, 115, 115, 115, 115, 115, - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115, - - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115, - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115 + 24, 24, 30, 31, 32, 32, 32, 41, 33, 33, + 33, 33, 33, 112, 33, 33, 33, 33, 33, 33, + 33, 33, 33, 33, 33, 33, 42, 43, 46, 111, + 44, 110, 48, 109, 47, 30, 31, 36, 33, 33, + 33, 49, 28, 28, 40, 52, 33, 33, 33, 108, + 107, 106, 37, 33, 33, 33, 105, 104, 103, 102, + + 38, 101, 100, 39, 54, 54, 54, 99, 54, 54, + 98, 97, 96, 95, 54, 54, 54, 54, 54, 54, + 94, 93, 57, 27, 27, 29, 29, 28, 28, 30, + 30, 92, 91, 90, 89, 88, 87, 86, 85, 84, + 83, 82, 81, 80, 79, 78, 77, 76, 75, 74, + 73, 72, 71, 70, 69, 68, 67, 66, 65, 64, + 63, 62, 61, 60, 59, 58, 56, 55, 31, 53, + 25, 51, 50, 45, 35, 34, 26, 25, 113, 3, + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + 113, 113, 113, 113, 113, 113, 113, 113 } ;
-static yyconst flex_int16_t yy_chk[221] = +static yyconst flex_int16_t yy_chk[219] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 8, 8, - 116, 8, 9, 9, 10, 10, 10, 113, 10, 10, - 13, 13, 13, 18, 10, 10, 10, 10, 10, 10, - 15, 15, 15, 111, 16, 16, 16, 17, 17, 17, - 21, 110, 18, 18, 20, 108, 18, 15, 16, 21, - 20, 27, 27, 106, 27, 29, 29, 105, 17, 16, - 33, 33, 33, 34, 34, 34, 104, 34, 34, 37, - - 37, 37, 103, 34, 34, 34, 34, 34, 34, 102, - 100, 99, 98, 97, 96, 95, 94, 93, 91, 90, - 89, 88, 87, 86, 84, 83, 82, 81, 37, 117, - 117, 118, 118, 119, 119, 120, 120, 80, 79, 78, - 77, 76, 75, 74, 73, 72, 71, 68, 67, 65, - 63, 61, 60, 56, 55, 54, 50, 49, 48, 47, - 45, 44, 43, 42, 41, 40, 39, 38, 36, 35, - 30, 28, 25, 23, 22, 19, 14, 11, 7, 5, - 3, 115, 115, 115, 115, 115, 115, 115, 115, 115, - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115, - - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115, - 115, 115, 115, 115, 115, 115, 115, 115, 115, 115 + 114, 8, 9, 9, 10, 10, 10, 18, 10, 10, + 13, 13, 13, 111, 10, 10, 10, 10, 10, 10, + 15, 15, 15, 17, 17, 17, 18, 18, 20, 109, + 18, 108, 21, 107, 20, 29, 29, 15, 16, 16, + 16, 21, 27, 27, 17, 27, 33, 33, 33, 105, + 104, 103, 16, 37, 37, 37, 102, 100, 99, 98, + + 16, 97, 96, 16, 34, 34, 34, 95, 34, 34, + 93, 92, 91, 90, 34, 34, 34, 34, 34, 34, + 89, 86, 37, 115, 115, 116, 116, 117, 117, 118, + 118, 85, 84, 83, 82, 81, 80, 79, 78, 77, + 76, 75, 74, 73, 70, 69, 65, 63, 62, 58, + 57, 56, 55, 51, 50, 49, 48, 46, 45, 44, + 43, 42, 41, 40, 39, 38, 36, 35, 30, 28, + 25, 23, 22, 19, 14, 11, 7, 5, 3, 113, + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + + 113, 113, 113, 113, 113, 113, 113, 113, 113, 113, + 113, 113, 113, 113, 113, 113, 113, 113 } ;
static yy_state_type yy_last_accepting_state; @@ -798,13 +798,13 @@ yy_match: while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 116 ) + if ( yy_current_state >= 114 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 182 ); + while ( yy_base[yy_current_state] != 180 );
yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -888,7 +888,7 @@ YY_RULE_SETUP YY_BREAK case 15: YY_RULE_SETUP -{yylval.number=PCI_DOMAIN; return(BUS);} +{yylval.number=DOMAIN; return(BUS);} YY_BREAK case 16: YY_RULE_SETUP @@ -1242,7 +1242,7 @@ static int yy_get_next_buffer (void) while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 116 ) + if ( yy_current_state >= 114 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; @@ -1270,11 +1270,11 @@ static int yy_get_next_buffer (void) while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 116 ) + if ( yy_current_state >= 114 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 115); + yy_is_jam = (yy_current_state == 113);
return yy_is_jam ? 0 : yy_current_state; } diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 8dfd50c..d87238f 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -266,8 +266,8 @@ struct device *new_device(struct device *parent, struct device *busdev, const in new_d->path = ".type=DEVICE_PATH_APIC_CLUSTER,{.apic_cluster={ .cluster = 0x%x }}"; break;
- case PCI_DOMAIN: - new_d->path = ".type=DEVICE_PATH_PCI_DOMAIN,{.pci_domain={ .domain = 0x%x }}"; + case DOMAIN: + new_d->path = ".type=DEVICE_PATH_DOMAIN,{.domain={ .domain = 0x%x }}"; break;
case IOAPIC: @@ -342,7 +342,7 @@ void add_register(struct device *dev, char *name, char *val) {
void add_pci_subsystem_ids(struct device *dev, int vendor, int device, int inherit) { - if (dev->bustype != PCI && dev->bustype != PCI_DOMAIN) { + if (dev->bustype != PCI && dev->bustype != DOMAIN) { printf("ERROR: 'subsystem' only allowed for PCI devices\n"); exit(1); } @@ -365,7 +365,7 @@ void add_ioapic_info(struct device *dev, int apicid, const char *_srcpin, int ir
srcpin = _srcpin[3] - 'A';
- if (dev->bustype != PCI && dev->bustype != PCI_DOMAIN) { + if (dev->bustype != PCI && dev->bustype != DOMAIN) { printf("ERROR: ioapic config only allowed for PCI devices\n"); exit(1); } @@ -529,7 +529,7 @@ static void inherit_subsystem_ids(FILE *file, struct device *dev)
for(p = dev; p && p != p->parent; p = p->parent) {
- if (p->bustype != PCI && p->bustype != PCI_DOMAIN) + if (p->bustype != PCI && p->bustype != DOMAIN) continue;
if (p->inherit_subsystem) { diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 3f3ac5c..4856171 100755 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -39,7 +39,7 @@ pnp {yylval.number=PNP; return(BUS);} i2c {yylval.number=I2C; return(BUS);} lapic {yylval.number=APIC; return(BUS);} lapic_cluster {yylval.number=APIC_CLUSTER; return(BUS);} -pci_domain {yylval.number=PCI_DOMAIN; return(BUS);} +domain {yylval.number=DOMAIN; return(BUS);} irq {yylval.number=IRQ; return(RESOURCE);} drq {yylval.number=DRQ; return(RESOURCE);} io {yylval.number=IO; return(RESOURCE);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 170ae74..7fa6988 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -133,7 +133,7 @@ static struct device *cur_parent, *cur_bus; I2C = 270, APIC = 271, APIC_CLUSTER = 272, - PCI_DOMAIN = 273, + DOMAIN = 273, IRQ = 274, DRQ = 275, IO = 276, @@ -478,7 +478,7 @@ static const char *const yytname[] = { "$end", "error", "$undefined", "CHIP", "DEVICE", "REGISTER", "BOOL", "BUS", "RESOURCE", "END", "EQUALS", "HEX", "STRING", "PCI", "PNP", "I2C", - "APIC", "APIC_CLUSTER", "PCI_DOMAIN", "IRQ", "DRQ", "IO", "NUMBER", + "APIC", "APIC_CLUSTER", "DOMAIN", "IRQ", "DRQ", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "IOAPIC_IRQ", "IOAPIC", "PCIINT", "$accept", "devtree", "$@1", "chipchildren", "devicechildren", "chip", "@2", "device", "@3", "resource", "registers", "subsystemid", "ioapic_irq", 0 diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index 3b45778..e1257f9 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -52,7 +52,7 @@ I2C = 270, APIC = 271, APIC_CLUSTER = 272, - PCI_DOMAIN = 273, + DOMAIN = 273, IRQ = 274, DRQ = 275, IO = 276, diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 12573a7..9a133a7 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -30,7 +30,7 @@ static struct device *cur_parent, *cur_bus; int number; }
-%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT +%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT %% devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ;