[coreboot] [v2] r4365 - in trunk/coreboot-v2: src/mainboard/msi/ms6178 src/northbridge/intel/i82810 targets/msi/ms6178

Author: uwe
Date: 2009-06-19 17:41:49 +0200 (Fri, 19 Jun 2009)
New Revision: 4365

Modified:
   trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb
   trunk/coreboot-v2/src/northbridge/intel/i82810/northbridge.c
   trunk/coreboot-v2/targets/msi/ms6178/Config.lb
Log:
Convert the MSI MS-6178 board to CBFS.
Also, enable HIGH_TABLES support for this board.

The HIGH_TABLES failed with:

No matching ram area found for range:
    [0x00000000000f0000, 0x0000000000100000)
  Ram areas
    [0x0000000000000000, 0x0000000000001000) Reserved
    [0x0000000000001000, 0x00000000000a0000) RAM
    [0x0000000000100000, 0x000000000fff0000) RAM
    [0x000000000fff0000, 0x0000000010000000) Reserved
  SELFBOOT RETURNED!
  Boot failed.

The fix was to change northbridge.c as follows:

- ram_resource(dev, idx++, 1024, tolmk - 1024);
  + ram_resource(dev, idx++, 768, tolmk - 768);

This is build-tested and tested on hardware by me. It boots fine,
for instace with SeaBIOS and the standard GRUB1 from my disk.

Signed-off-by: Uwe Hermann 
Acked-by: Myles Watson

Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb	2009-06-19 12:03:40 UTC (rev 4364)
+++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb	2009-06-19 15:41:49 UTC (rev 4365)
@@ -65,6 +65,7 @@
 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
+uses HAVE_HIGH_TABLES

default ROM_SIZE = 512 * 1024
 default HAVE_FALLBACK_BOOT = 1
@@ -75,7 +76,7 @@
 default MAINBOARD_VENDOR = "N/A"	# Override this in targets/*/Config.lb.
 default MAINBOARD_PART_NUMBER = "N/A"	# Override this in targets/*/Config.lb.
 default ROM_IMAGE_SIZE = 64 * 1024
-default FALLBACK_SIZE = 128 * 1024
+default FALLBACK_SIZE = ROM_IMAGE_SIZE
 default STACK_SIZE = 8 * 1024
 default HEAP_SIZE = 16 * 1024
 default HAVE_OPTION_TABLE = 0
@@ -96,10 +97,6 @@
 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
 default CONFIG_CONSOLE_VGA = 1
 default CONFIG_PCI_ROM_RUN = 1
-
-#
-# CBFS
-#
-#
-default CONFIG_CBFS=0
+default CONFIG_CBFS = 1
+default HAVE_HIGH_TABLES = 1
 end

Modified: trunk/coreboot-v2/src/northbridge/intel/i82810/northbridge.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/intel/i82810/northbridge.c	2009-06-19 12:03:40 UTC (rev 4364)
+++ trunk/coreboot-v2/src/northbridge/intel/i82810/northbridge.c	2009-06-19 15:41:49 UTC (rev 4365)
@@ -170,7 +170,7 @@
    	/* Report the memory regions. */
    	idx = 10;
    	ram_resource(dev, idx++, 0, 640);
-		ram_resource(dev, idx++, 1024, tolmk - 1024);
+		ram_resource(dev, idx++, 768, tolmk - 768);

#if HAVE_HIGH_TABLES==1
    	/* Leave some space for ACPI, PIRQ and MP tables */

Modified: trunk/coreboot-v2/targets/msi/ms6178/Config.lb
===================================================================
--- trunk/coreboot-v2/targets/msi/ms6178/Config.lb	2009-06-19 12:03:40 UTC (rev 4364)
+++ trunk/coreboot-v2/targets/msi/ms6178/Config.lb	2009-06-19 15:41:49 UTC (rev 4365)
@@ -22,7 +22,6 @@
 mainboard msi/ms6178

option ROM_SIZE = 512 * 1024
-# option ROM_SIZE = (512 * 1024) - (32 * 1024)

option MAINBOARD_VENDOR = "MSI"
 option MAINBOARD_PART_NUMBER = "MS-6178"
@@ -48,3 +47,6 @@
 end

buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+
+# pci_rom i810.vga vendor_id=0x8086 device_id=0x7120
+