Re: [coreboot] DL145 G1 with dual dualcore CPU using coreboot ?

[Myles Watson]

On Sat, Aug 7, 2010 at 9:57 AM, Oskar Enoksson  wrote:
> Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without
> stopping the "development server" , then moving it to the target server
> and power it up (although it takes some effort to avoid bending the pins)

Great.
> However I'm not getting any output whatsoever from the target server.
> Nothing on the serial port, nothing on the VGA output.

Have you tested the serial port under Linux?  I'm surprised that you
don't see anything since the board is so similar.
> If I restore the original BIOS content using "flashrom" the target
> server BIOS starts again as before, so I know that the erase/write
> process works. It's the coreboot image file that is somehow wrong.

Good.
> What to do? Any hints? I've put my mainboard/hp/dl145_g1 directory
> contents at http://www.lysator.liu.se/~enok/dl145_g1/

Do you have a POST (power on self test) card?  That could help.

Have you tried hot swapping the BIOS?  Boot the factory BIOS into
Linux, replace with the coreboot BIOS, and restart.  I don't think
that should matter, but I'm really surprised that you don't see any
serial port output.
> I don't fully understand the structure of devicetree.cb and how it
> should correlate to the output of "lspci -tv". Below is my lspci. What
> should devicetree.cb look like?

Unfortunately you can't tell from the lspci which link the
HyperTransport devices are connected to (You can tell from lspci
-vvvxxxx -s 0:18.0.) There is a lot of serial port output before the
device tree gets used, though, so we can put off worrying about that
until later.  The way to change which link the devices are on is to
reorder the device pci 18.0 statements.

Right now the devices are on link 2:

device pci 18.0 on end # LDT0
    		device pci 18.0 on end # LDT1
    		device pci 18.0 on     # LDT2
    			#  devices on link 2, link 2 == LDT 2
    			chip southbridge/amd/amd8131
    		...
    		end

To put them on link 1:

device pci 18.0 on end # LDT0
    		device pci 18.0 on     # LDT1
    			#  devices on link 1, link 1 == LDT 1
    			chip southbridge/amd/amd8131
    		...
    		end
    		device pci 18.0 on end # LDT2

To put them on link 0:

device pci 18.0 on     # LDT0
    			#  devices on link 0, link 0 == LDT 0
    			chip southbridge/amd/amd8131
    		...
    		end
    		device pci 18.0 on end # LDT1
    		device pci 18.0 on end # LDT2

Thanks,
Myles