On Sat, Apr 30, 2011 at 11:11:37PM -0500, Scott Duplichan wrote:
Anton Kochkov wrote:
] May be add something like profiling option with patch for implementing ] such feature? ] Best regards, ] Anton Kochkov.
Hello Anton,
In the past I have seen such logging code added to a BIOS code base. It was for Phoenix legacy if I remember correctly. A challenge with this method is using it to exactly pinpoint a problem. For this board
There is a tool in the seabios repo - tools/readserial.py . It can be run on a separate host that reads the debug serial output - it provides timing info on each line read and can adjust the times to eliminate the cost of writing to the serial port.
It's not perfect, but it can provide a broad overview of where time is spent.
If you haven't already tried it, it's usage follows:
./tools/readserial.py /dev/ttyS0 115200
For this board I have the luxury of a jtag debugging setup, the Sage SmartProbe. This arrangement is very handy for boot time reduction. I do a crude form of profiling by breaking in randomly during post. I still find it spending some time in lzma decode of ramstage. That time was reduced by the -flto compiler option.
Thanks - I'll have to try that on my board (an old epia-cn machine). I found lzma to be time intensive.
-Kevin