Hi,Paul. What I need to do for adding this board to this project? I think I have all instruments for this, three boards,pair of Quad opteron 2300 Series Barcelona, pair of Quad opteron 2300 Series Shanghai, LPC programmer, 8Mbit chips SST 49LF080A. I read Developer manual and look for C files of similar boards based on one or two MCP55. I know that this board based on pair of southbridge MCP55 SuperIO ITE 8716F Using i2c tools I know that I2C Bus used for memory controller only and similar struction is
device pci 1.1 on # SM 0 chip drivers/generic/generic # DIMM 0-0-0 device i2c 50 on end end chip drivers/generic/generic # DIMM 0-0-1 device i2c 51 on end end device pci 1.1 on # SM 1 chip drivers/generic/generic # DIMM 0-1-0 device i2c 52 on end end chip drivers/generic/generic # DIMM 0-1-1 device i2c 53 on end end
Now I try to create file devicetree.cb using information from lspci -nnxxx,but I'm got confused a little with PCI addressing
02:00.0 Mass storage controller [0180]: Silicon Image, Inc. SiI 3531 [SATALink/SATARaid] Serial ATA Controller [1095:3531] (rev 01) 05:0b.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044] (rev c0) 80:00.0 RAM memory [0500]: nVidia Corporation MCP55 Memory Controller [10de:0369] (rev a2) 80:01.0 RAM memory [0500]: nVidia Corporation MCP55 LPC Bridge [10de:0360] (rev a3) 80:01.1 SMBus [0c05]: nVidia Corporation MCP55 SMBus [10de:0368] (rev a3) 80:05.0 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3) 80:05.1 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3) 80:05.2 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3) 80:0a.0 PCI bridge [0604]: nVidia Corporation MCP55 PCI Express bridge [10de:0376] (rev a3) 80:0f.0 PCI bridge [0604]: nVidia Corporation MCP55 PCI Express bridge [10de:0377] (rev a3)
This file devicetree.cb that I attached, is not suitable for GCC compiler yet . Thank you for your future help.