Author: uwe Date: 2007-10-07 23:48:26 +0200 (Sun, 07 Oct 2007) New Revision: 2837
Modified: trunk/util/superiotool/nsc.c Log: Detection support for a bunch of NSC Super I/Os (trivial). Also, dump support for the NSC PC87351.
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Uwe Hermann uwe@hermann-uwe.de
Modified: trunk/util/superiotool/nsc.c =================================================================== --- trunk/util/superiotool/nsc.c 2007-10-07 21:00:02 UTC (rev 2836) +++ trunk/util/superiotool/nsc.c 2007-10-07 21:48:26 UTC (rev 2837) @@ -24,10 +24,74 @@ #define CHIP_ID_REG 0x20 /* Super I/O ID (SID) / family */ #define CHIP_REV_REG 0x27 /* Super I/O revision ID (SRID) */
-/* SID[7..0]: chip family. SRID[7..5]: chip ID, SRID[4..0]: chip rev. */ const static struct superio_registers reg_table[] = { + {0xd0, "PC87371", { /* From sensors-detect */ + {EOT}}}, + {0xdf, "PC97371", { /* From sensors-detect */ + {EOT}}}, + {0xe1, "PC87360", { + {EOT}}}, + {0xe2, "PC87351", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT}, + {0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT}, + {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}}, + {0x1, "Parallel port", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}}, + {0x2, "COM2", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}}, + {0x3, "COM1", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}}, + {0x4, "System wake-up control (SWC)", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT}, + {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}}, + {0x5, "Mouse", + {0x30,0x70,0x71,0x74,0x75,EOT}, + {0x00,0x0c,0x02,0x04,0x04,EOT}}, + {0x6, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75, + 0xf0,EOT}, + {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04, + 0x40,EOT}}, + {0x7, "GPIO", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT}, + {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,EOT}}, + {0x8, "Fan speed control", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}}, + {EOT}}}, + {0xe4, "PC87364", { + {EOT}}}, + {0xe5, "PC87365", { /* SRID[7..0] == chip revision */ + {EOT}}}, + {0xe8, "PC87363", { + {EOT}}}, + {0xe9, "PC87366", { + {EOT}}}, + + /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */ + {0xea, "PC8739x", { + {EOT}}}, + {0xec, "PC87591x", { + /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */ + {EOT}}}, + {0xee, "PC8741x", { + /* SRID[7..5] is marked as "not applicable for the PC8741x". */ + {EOT}}}, + {0xf0, "PC87372", { + {EOT}}}, {0xf1, "PC8374L", { {EOT}}}, + {0xf2, "PC87427", { + /* SRID[7..5] is marked as "not applicable for the PC87427". */ + {EOT}}}, + {0xf3, "PC87373", { + {EOT}}}, {EOT} };