Hi,
On Thu, May 7, 2020 at 7:13 PM Nico Huber nico.h@gmx.de wrote:
Hi,
On 07.05.20 18:11, Felix Held wrote:
I'd say that flashrom only verifying the section it writes by default would be less surprising behavior than the current behavior.
we'd need a distinction between reliable and unreliable programmers first. Because not verifying everything with the latter can be fatal (we don't even know if commands / addresses were correctly received by the flash). And that's just the biggest problem. Restrictions of internal programmers (e.g. Intel) can cause trouble too (what erase command does the PCH send? oops, did the chip ignore the least signi- ficant address bits?).
Given these risks, I prefer to have safe defaults. It's better to error out early instead of silently corrupting something.
Something I have noted is that flashrom is too verbose by default, and too much text means people are more likely to not read it in detail. If we can't be quieter, maybe we should indent warning and error messages so that they stick out (literally).
So, "the section it writes by default" is pretty much unknown. We could still have a better default ofc. In this particular case (Intel restricts reading) we could default to read everything that can be read (usually, parts of the chip that can't be read also can't be written, so that should be safe). But that's a bigger change (very big given flashrom's development pace).
That can be risky. If people just run flashrom and both reading and verifying complete successfully, they might think that they have a good backup image. However, that will not be the case. If running flashrom without any additional parameters does not work, people might wonder why and end up learning about the read restrictions imposed by the hardware. Maybe we can reach a compromise and make `--ifd` without specifying any regions do such a thing? Even then, we would still need to handle writes...
Nico _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
Best regards,
Angel