Steve Gehlbach steve@nexpath.com writes:
Eric W. Biederman wrote:
``Write Protect'' in the mtrrs does not mean write protected. It is a strange
messed up form of write-through. In particular it dumps the cache on writes it does not forbid writes. Unless you know of a situation where write protect is more appropriate please use write-through. It is less confusing, and since no one is writing to that area anyway it gives the exact same result, reads are cached. Eric
Good point, but do you think it would matter for reflashing?.
Neither type will work reliably when reflashing. The read caching prevents polling of the status bits, to function properly.
I don't know if Linux resets the MTRRs when booting, or assumes the BIOS has already done that.
LinuxBIOS does that. And it is at least legal to manipulate that in an mtd map driver if necessary.
I got into the habit of using the WP setting because MS does it this way for the ROM areas for the Xbox (copying MS is probably not a good reason for doing anything!).
WP is the least aggressive form of caching. And in principle I don't have any problems with it. But it's name is very non-intuitive.
For all to reference, Intel manual: Write protected (WP)Reads come from cache lines when possible, and read
misses cause cache fills. Writes are propagated to the system bus and cause corresponding cache lines on all processors on the bus to be invalidated. Speculative reads are allowed. This memory type is available in the
Pentium 4, Intel Xeon, and P6 family processors by programming the MTRRs (seeTable 10-6).
-Steve