ron minnich rminnich@lanl.gov writes:
I think we should ask for a working cache-as-ram solution for both future K8 chips and for the (rumored) K9
Go right ahead. If you need leverage Intel has added a PAL opcode for it to the Itanium. And the latest Itaniums support it. And the PEI stage of EFI will require it or something equivalent.
Eric