Re: [coreboot] [Mohon Peak] Console output on external UARTs behind PCIe

[Kyösti Mälkki]

On Wed, 2015-03-11 at 16:21 +0100, Patrick Agrain wrote:
> Hello Kyösti,
>
> I tried what you suggested below:
> Enabled EARLY_PCI_BRIDGE
> Set Bridge at D:1 F:0
> Enabled OXI PCIe952 and disabled SERIAL_PORT_ON_SUPERIO.
>
> Reboot Mohon Peak CRB: failed. No output. POST code at 0xA9.

You also need to set EARLY_PCI_MMIO_BASE. If you cannot boot this board
to OS yet and run lspci command, try with 0xfef00000 that should be
safely out of the way of other resources.

I don't think post 0xA9 originates from coreboot proper.
> Will try to get further.
> If anybody has an idea...

If by any means possible, boot your Mohon Peak board to OS, check your
serial terminal parameters and cables, and prepare the OS for logins
over serial line. Then return here with the lspci -vv output so we have
something to work with.

Kyösti