[coreboot] r1016 - coreboot-v3/mainboard/artecgroup/dbe61

Author: mraudsepp
Date: 2008-11-13 18:14:16 +0100 (Thu, 13 Nov 2008)
New Revision: 1016

Modified:
   coreboot-v3/mainboard/artecgroup/dbe61/initram.c
Log:
artecgroup/dbe61: Gather RAM initialization function calls to one helper function.

Then we can later use it for re-initializing for different SPD without code duplication.

Signed-off-by: Mart Raudsepp 
Acked-by: Peter Stuge

Modified: coreboot-v3/mainboard/artecgroup/dbe61/initram.c
===================================================================
--- coreboot-v3/mainboard/artecgroup/dbe61/initram.c	2008-11-13 17:12:34 UTC (rev 1015)
+++ coreboot-v3/mainboard/artecgroup/dbe61/initram.c	2008-11-13 17:14:16 UTC (rev 1016)
@@ -135,6 +135,21 @@
    /* Early mainboard specific GPIO setup */
 }

+static void initialize_ram(u8 dimm0, u8 dimm1)
+{
+	cpu_reg_init(0, dimm0, dimm1, DRAM_UNTERMINATED);
+	printk(BIOS_DEBUG, "done cpu reg init\n");
+
+	sdram_set_registers();
+	printk(BIOS_DEBUG, "done sdram set registers\n");
+
+	sdram_set_spd_registers(dimm0, dimm1);
+	printk(BIOS_DEBUG, "done sdram set spd registers\n");
+
+	sdram_enable(dimm0, dimm1);
+	printk(BIOS_DEBUG, "done sdram enable\n");
+}
+
 /** 
   * main for initram for the PC Engines Alix 1C.  It might seem that you
   * could somehow do these functions in, e.g., the cpu code, but the
@@ -155,18 +170,8 @@
    pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO);
    printk(BIOS_DEBUG, "done pll reset\n");

-	cpu_reg_init(0, DIMM_DBE61C, DIMM_EMPTY, DRAM_UNTERMINATED);
-	printk(BIOS_DEBUG, "done cpu reg init\n");
+	initialize_ram(DIMM_DBE61C, DIMM_EMPTY);

-	sdram_set_registers();
-	printk(BIOS_DEBUG, "done sdram set registers\n");
-
-	sdram_set_spd_registers(DIMM_DBE61C, DIMM_EMPTY);
-	printk(BIOS_DEBUG, "done sdram set spd registers\n");
-
-	sdram_enable(DIMM_DBE61C, DIMM_EMPTY);
-	printk(BIOS_DEBUG, "done sdram enable\n");
-
    /* Check low memory */
    /*ram_check(0x00000000, 640*1024); */