Author: stepan Date: Wed May 19 20:39:23 2010 New Revision: 5572 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5572
Log: cosmetic comment changes. Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/src/include/cpu/x86/cache.h
Modified: trunk/src/include/cpu/x86/cache.h ============================================================================== --- trunk/src/include/cpu/x86/cache.h Wed May 19 12:01:37 2010 (r5571) +++ trunk/src/include/cpu/x86/cache.h Wed May 19 20:39:23 2010 (r5572) @@ -20,18 +20,17 @@ #ifndef CPU_X86_CACHE #define CPU_X86_CACHE
-/* the memory clobber prevents the GCC from reordering the read/write order - of CR0 */ - -#if defined(__GNUC__) - /* -Need this because ROMCC fails here with: + * Need two versions because ROMCC chokes on certain clobbers: + * cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33: + * 0x1559920 asm Internal compiler error: lhs 1 regcm == 0 + */
-cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33: -0x1559920 asm Internal compiler error: lhs 1 regcm == 0 -*/ +#if defined(__GNUC__)
+/* The memory clobber prevents the GCC from reordering the read/write order + * of CR0 + */ static inline unsigned long read_cr0(void) { unsigned long cr0;