[coreboot] [PATCH] fix for Winbond W83627DHG superio

-- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 Without these fixes the w83627dhg driver (which is currently not used by any mainboard in the tree) does neither compile nor work. Signed-off-by: Stefan Reinauer stepan@coresystems.de Index: src/superio/winbond/w83627dhg/superio.c =================================================================== --- src/superio/winbond/w83627dhg/superio.c (.../branches/upstream/coreboot-v2) +++ src/superio/winbond/w83627dhg/superio.c (.../trunk/coreboot-v2) @@ -103,7 +103,8 @@ { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0xfff, 0 }, { 0xfff, 0x4}, }, - { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, + // the next line makes coreboot hang in pnp_enable_devices() + // { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, { &ops, W83627DHG_GPIO6, }, { &ops, W83627DHG_WDTO_PLED, }, { &ops, W83627DHG_GPIO2345, }, Index: src/superio/winbond/w83627dhg/w83627dhg.h =================================================================== --- src/superio/winbond/w83627dhg/w83627dhg.h (.../branches/upstream/coreboot-v2) +++ src/superio/winbond/w83627dhg/w83627dhg.h (.../trunk/coreboot-v2) @@ -26,7 +26,7 @@ #define W83627DHG_SPI 6 /* Serial peripheral interface */ #define W83627DHG_GPIO6 7 /* GPIO6 */ #define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */ -#define W83627DHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */ +#define W83627DHG_GPIO2345 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */ #define W83627DHG_ACPI 10 /* ACPI */ #define W83627DHG_HWM 11 /* Hardware monitor */ #define W83627DHG_PECI_SST 12 /* PECI, SST */