[coreboot] New patch to review for coreboot: 5a0f3f4 M4A785-M and M4A785T-M: Add support for llshell

[Denis Carikli]

Denis Carikli ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1102

-gerrit

commit 5a0f3f476fd4780495bfe8ba04fb96bf4d646795
Author: Denis 'GNUtoo' Carikli 
Date:   Thu Jun 14 14:21:09 2012 +0200

M4A785-M and M4A785T-M: Add support for llshell

Change-Id: Ia9ee1bcd363896a8618407149fafdd354e6c0a88
    Signed-off-by: Denis 'GNUtoo' Carikli 
---
 src/mainboard/asus/m4a785-m/romstage.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index f0be2f7..338edf4 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -50,6 +50,7 @@
 #include "southbridge/amd/sb700/sb700.h"
 #include "southbridge/amd/sb700/smbus.h"
 #include "northbridge/amd/amdfam10/debug.c"
+#include "arch/llshell.h"

static void activate_spd_rom(const struct mem_controller *ctrl) { }

@@ -221,6 +222,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    sb7xx_51xx_before_pci_init();

post_code(0x42);
+
+#if CONFIG_LLSHELL
+       llshell();
+#endif
+
    post_cache_as_ram();	// BSP switch stack to ram, copy then execute LB.
    post_code(0x43);	// Should never see this post code.
 }