#42: Disable SMM on K8 platforms ----------------------------------+----------------------------------------- Reporter: stepan | Owner: stepan Type: defect | Status: assigned Priority: major | Milestone: Going mainstream Component: code | Version: v2 Resolution: | Keywords: SMM, security Due_close: MM/DD/YYYY | Include_gantt: 0 Dependencies: | Due_assign: MM/DD/YYYY Patchstatus: there is no patch | ----------------------------------+----------------------------------------- Changes (by stepan):
* status: new => assigned
Comment:
SMM is a CPU/Northbridge thing on AMD64 processors. No need to do anything with the chipset. Check out chapter 6 of the the BKDG at http://www.amd.com/us- en/assets/content_type/white_papers_and_tech_docs/26094.PDF
What we _might_ want do though is add a small SMM handler at 38000 but that is a completely different issue.
SMM_BASE register holds the base of the system management memory region, and its default value is 30000h. The first SMI handler instruction is fetched at SMM_BASE + 8000h.