Re: [coreboot] [PATCH] flashrom: Differentiate SPI errors

[FENG Yu Ning]

On Fri, Nov 28, 2008 at 10:00 AM, Carl-Daniel Hailfinger
 wrote:
> New patch:
> Improve error handling even more.
> Add the ability to adjust REMS and RES addresses to the minium supported
> read address with the help of spi_get_valid_read_addr(). That function
> needs to call SPI controller specific functions like reading BBAR on ICH.
>
> Signed-off-by: Carl-Daniel Hailfinger
> Index: flashrom-ichspi_better_errorcodes/spi.c
>
> --- flashrom-ichspi_better_errorcodes/spi.c     (Revision 3775)
> +++ flashrom-ichspi_better_errorcodes/spi.c     (Arbeitskopie)
> @@ -53,9 +53,11 @@
>  static int spi_rdid(unsigned char *readarr, int bytes)
>  {
>        const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
>   int ret;
>
>   if (spi_command(sizeof(cmd), bytes, cmd, readarr))
>           return 1;
>   ret = spi_command(sizeof(cmd), bytes, cmd, readarr);
>   if (ret)
>           return ret;

Maybe "rc" sounds better? That is also the name we use elsewhere. A
minor problem, though.
> @@ -63,20 +65,42 @@
>
> static int spi_rems(unsigned char *readarr)
>  {
>   const unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 };
>   unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 };
>   uint32_t readaddr;
>   int ret;
>
>   if (spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr))
>           return 1;
>   ret = spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
>   if (ret == SPI_INVALID_ADDRESS) {
>           /* Find the lowest even address allowed for reads. */
>           readaddr = (spi_get_valid_read_addr() + 1) & ~1;
>           cmd[1] = (readaddr >> 16) & 0xff,
>           cmd[2] = (readaddr >> 8) & 0xff,
>           cmd[3] = (readaddr >> 0) & 0xff,
>           ret = spi_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
>   }
>   if (ret)
>           return ret;
>  printf_debug("REMS returned %02x %02x.\n", readarr[0], readarr[1]);
>  return 0;
>
> }

Just after IRC communication, I suddenly realized that ICH7(or the
flash chip ctrl'ed by it) translate addresses in this way:

actual_addr = 0x 1 00 00 00 - total_size + addr_in_cmd.

Two facts support the above guess:
1. the ich7 spec(307013) says the following in 5.25.3.1:
"Serial flash device must ignore the upper address bits such that an
address of FF FF FFh simply aliases to the top of the flash memory."
2. I issued the Read ID cmd with address 0x f8 00 00 to the 512K
sst25lf040a and got the expected result when its data sheet said the
address  should be 0x 00 00 00.

Maybe we could change those zero addresses to better ones for ich spi commands.

yu ning