coreboot needs to initialize the display and provide the framebuffer for edk2 to use. What display init option do you have selected? It needs to be 'RUN FSP GOP' and a valid VBT is needed for the FSP PEI GOP driver to successfully execute
On Tue, Apr 4, 2023 at 8:17 AM cagatay bagci via coreboot < coreboot@coreboot.org> wrote:
Hello all, I have a custom CFL board. I used Tianocore UEFI payload. It boots without problem on console and I can enter BIOS menu. I put appropriate vbt.bin file and added that path to config file, so VBT exists. However, I cannot get display output. I inspected debug log and it says "graphics hand-off block not found" in one line. I understand that FSP does not build "gEfiGraphicsInfoHobGuid". Do you have an idea why FSP does not produce that HOB?
In addition to that, by using FSP debug binary, I can see that FSP does not even enter PeiGraphicsEntryPoint. It somehow quits after "SerialIoInit() Start" and notifys Post PCI Enumeration.
Thanks,
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