Arne Georg Gleditsch arne.gleditsch@numascale.com writes:
Regarding hangs, I suspect this might be a PCI config race condition between the cores. I tried to adjust my configuration to use MMCONFIG to address this. It didn't seem to be supported out of the box, and I didn't have the time to look into it further at the moment. I still intend to do so, but it would be nice to know if anyone is using MMCONFIG with fam10 configurations. Is it supposed to work?
Having looked at it some more, it is hard to see how mmconf support can possibly be functional at the moment. I've made some progress on getting it to work on my s2912 test rig; I'm appending the patch I'm currently running. (This is against r5200.)
My only remaining real issue is that parts of the nvidia mcp55 init code will not run properly using mmconf. The offending line is
RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000,
which causes the operations
pci_read_config32: 00010000:0078: 20040000 pci_write_config32: 00010000:0078: 19040000
the second of which never returns when executed using mmconf. I'm speculating that this might be related to missing HT responses or something due to bus reconfiguration. As far as I can tell the device being targeted here is 10de:0364 (ISA bridge: nVidia Corporation MCP55 LPC Bridge).
Anoyone familiar with the mcp55 who can shed some light on what this write is supposed to accomplish and perhaps also on why it succeeds using the IO config mechanism when mmconf fails?