SONE Takeshi ts1@tsn.or.jp writes:
On Fri, Apr 25, 2003 at 06:55:37PM -0600, Eric W. Biederman wrote:
In cpu/p6/earlymtrr.inc, 0xf0000-0xfffff is left uncached. (Only 0-640KB is cached, 640KB-1M is uncached) I will try adding code there to set fixed MTRR for 0xf0000-0xfffff WP caching. It should be harmless for other boards that do not need this, what do you think?
Not sure. Need to see if the RAM is turned on for this region later after
the
C-code starts, if so, then the cache memory type may have to be changed from
WP
to normal.
I tried it anyway and it worked great. Now I can't see anything between 'Copying LinuxBIOS to ram' and IDE loading message because it's too fast!
The generic code should handle this. I believe all of the mtrrs are rebuilt.
I think it's rebuilt in mtrr.c.
My modification is below.
``Write Protect'' in the mtrrs does not mean write protected. It is a strange messed up form of write-through. In particular it dumps the cache on writes it does not forbid writes.
Unless you know of a situation where write protect is more appropriate please use write-through. It is less confusing, and since no one is writing to that area anyway it gives the exact same result, reads are cached.
Eric