on 04/12/2008 01:56 Stefan Reinauer said the following:
Uwe Hermann wrote:
...
On Sun, Nov 30, 2008 at 10:07:55PM +0100, Stefan Reinauer wrote:
...
/* Reading this register will hang a macbook pro */printf("pmbase+0x%04x: 0xXXXXXXXX\n", i);Any idea why? Hardware problem or OS problem? Does Linux on Apple hardware have the same issue? If yes, the "#ifdef DARWIN" check may not be correct/complete.
I am not sure yet. There is no Linux on that box. It might even be a generic ICH8 thing. Time will show and bring a patch when we find out.
From publicly available ICH9 spec (I guess ICH8 is the same here):
<quote> LV2 — Level 2 Register I/O Address: PMBASE + 14h ... Reads to this register return all 0s, writes to this register have no effect. Reads to this register generate a “enter a level 2 power state” (C2) to the clock control logic. This will cause the STPCLK# signal to go active, and stay active until a break event occurs. Throttling (due either to THTL_EN or FORCE_THTL) will be ignored. ... NOTE: This register should not be used by IA-64 processors or systems with more than 1 logical processor, unless appropriate semaphoring software has been put in place to ensure that all threads/processors are ready for the C2 state when the read to this register occurs. </quote>
The subsequent byte registers are LV3, LV4, LV5 and for mobile version LV6 intended for entering C3, C4, C5 and C6 states.