Prakash Punnoor wrote:
]BTW, could you explain what happens after soft_reset? Will coreboot run ]again from start?
Yes, the CF9 soft reset starts execution at the reset vector same as a cold boot.
] At least the following "die(...)" statement (romstage.c ]cache_as_ram_main) suggests that program flow should NOT get there. So, if ]coreboots runs again from start, why doesn't it enable port 80 again like ]it did initially?
I am not sure. But the important function is sb7xx_51xx_pci_port80(), called from line 90 of romstage.c. It looks like that function does everything needed to enable PCI port 80. You could try calling the function unconditionally and see what happens.
Thanks, Scott
]Thanks, ] ]Prakash