[coreboot] r1035 - coreboot-v3/mainboard/gigabyte/m57sli

Author: hailfinger
Date: 2008-11-16 17:09:09 +0100 (Sun, 16 Nov 2008)
New Revision: 1035

Modified:
   coreboot-v3/mainboard/gigabyte/m57sli/Makefile
   coreboot-v3/mainboard/gigabyte/m57sli/dts
Log:
Gigabyte M57SLI compilation is broken in v3. With a small makefile and
dts change, the target compiles again.

Signed-off-by: Carl-Daniel Hailfinger 
Acked-by: Peter Stuge

Modified: coreboot-v3/mainboard/gigabyte/m57sli/Makefile
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/Makefile	2008-11-16 13:45:53 UTC (rev 1034)
+++ coreboot-v3/mainboard/gigabyte/m57sli/Makefile	2008-11-16 16:09:09 UTC (rev 1035)
@@ -21,6 +21,7 @@

STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
    		$(src)/mainboard/$(MAINBOARDDIR)/stage1.c \
+			$(src)/arch/x86/resourcemap.c \
    		$(src)/arch/x86/stage1_mtrr.c \
    		$(src)/arch/x86/amd/model_fxx/dualcore_id.c \
    		$(src)/arch/x86/amd/model_fxx/stage1.c \

Modified: coreboot-v3/mainboard/gigabyte/m57sli/dts
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/dts	2008-11-16 13:45:53 UTC (rev 1034)
+++ coreboot-v3/mainboard/gigabyte/m57sli/dts	2008-11-16 16:09:09 UTC (rev 1035)
@@ -55,5 +55,9 @@
    			/config/("southbridge/nvidia/mcp55/sata.dts");
    		};
    	};
+		ioport@2e {
+			/config/("superio/ite/it8716f/dts");
+			com1enable = "1";
+		};
    };
 };