Re: [coreboot] [PATCH] SECC Pentium 2/3 users are gonna love this

[Roger]

On Wed, Jan 12, 2011 at 10:55:37PM -0500, Keith Hui wrote:
> The L2 cache on a Coppermine doesn't need any special enabling
> sequence. I just put a 1GHz Coppermine into my board and it boots fine
> showing the full 256k cache. This patch doesn't even apply to them
> anyway.

FYI: Have 450P3 and 2x750P3's here and none of my coreboot logs state anything
about L2 being activated.  From what you're saying, the L2 cache is entirely
automatically activated on Coppermines.

Cheers.