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On 03/21/2018 12:47 PM, Daniel Wagner wrote:
Hi,
Hello Daniel, thank you for reading 3mdeb blog :)
I would like to test my -rt kernels releases on the minnowboard. Though cyclictest always reports 2 to 4 ms spikes. It looks like that the original firmware is stealing those cycles. So my plan was to try out coreboot and see if my theory is correct or not.
Now, I am struggling with getting anything working. All my attempts to bake a working binary have been completely fruitless. Not a single char on the serial port. If I would at least get something on the serial port I could find my way through the maze.
MinnowBoard is already integrated. What board are you using ? Is this MinnowBoard Turbot B ?
We were able successfully build coreboot for that platform. What is important is flashing only coreboot region without damaging TXE because that makes platform unbootable.
We even prepared Dockerized environment:
$ docker pull 3mdeb/coreboot-trainings-sdk $ git clone https://review.coreboot.org/coreboot $ docker run --rm -it -v $PWD/coreboot:/home/coreboot/coreboot -w \ /home/coreboot/coreboot 3mdeb/coreboot-trainings-sdk /bin/bash (docker)$ make menuconfig
# select Mainboard vendor (Intel) # select Mainboard model (Minnow Max)
(docker) $ make -j$(nproc) (docker) $ cd util/ifdtool && make
Use compiled ifdtool against oryginal firmware that you flashed to the board:
$ ./util/ifdtool/ifdtool -f layout MNW2MAX1.X64.0097.D01.1709211100.bin
This will give you layout file similar to: 00000000:00000fff fd 00400000:007fffff bios 00001000:003fffff me 00000000:00000fff gbe
Then copy build/coreboot.rom and layout file to your RPi and flash:
(rpi) $ flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=32000 -l \ layout -i bios -w /tmp/coreboot.rom
Our container have default FSP from GitHub which is not the most recent one. Latest you can obtain only through Intel RDC portal.
Best Regards, - -- Piotr Król Embedded Systems Consultant https://3mdeb.com | @3mdeb_com