On Dec 26, 2007 1:58 AM, aaron lwe aaron.lwe@gmail.com wrote:
I'm now having trouble with mtrr, after setting variable mtrr, data gets corrupted.
this can be still be caused by bad dram timing. Once you start caching, cache flush to ram will be a burst. If the dram timing is not right, you will get data corruption that will not occur with caching off. I used to have this happen very frequently.
So, I still think you have a memory configuration problem.
ron