Hi, all I have compiled coreboot+adlo for my EPIA-ML mainboard following the instruction on WIKI. All things works well except that there is display on VGA port. I have extract a vga bios from via bios and the information from serial port as following:
Enabling mainboard devices Enabling shadow ram vt8623 init starting Detecting Memory Number of Banks 04 Number of Rows 0d Priamry DRAM width08 No Columns 0a MA type e0 Bank 0 (*16 Mb) 10 No Physical Banks 01 Total Memory (*16 Mb) 10 CAS Supported 2.5 Cycle time at CL X (nS)50 Cycle time at CL X-0.5 (nS)00 Cycle time at CL X-1 (nS)00 Starting at CAS 2.5 tRP 3c tRCD 3c tRAS 28 Low Bond 00 High Bondda Setting DQS delay91vt8623 done 00:06 11 23 31 06 00 30 22 00 00 00 06 00 00 00 00 10:08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40:00 18 88 80 82 44 00 00 18 99 88 80 82 44 00 00 50:c8 de cf 88 e0 07 00 00 e0 00 10 10 10 10 00 00 60:02 ff 00 30 62 32 01 20 42 2d 43 58 00 44 00 00 70:82 48 00 01 01 08 50 00 01 00 00 00 00 00 00 00 80:0f 60 00 00 80 00 00 00 02 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:02 c0 20 00 07 02 00 1f 04 00 00 00 2f 02 04 00 b0:00 00 00 00 80 00 00 00 48 00 00 04 00 00 00 00 c0:01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 dd 00 00 00 00 01 00 40 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 12 13 00 00 00 00 00 00 00 00 AGP Doing MTRR init. Uncompressing coreboot to RAM. Jumping to coreboot. coreboot-2.0.0.0-Normal Thu Jan 22 11:03:19 HKT 2009 booting... clocks_per_usec: 1721 Enumerating buses... APIC_CLUSTER: 0 enabled Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1106/3123] enabled PCI: 00:01.0 [1106/b091] enabled Disabling static device: PCI: 00:0a.0 Disabling static device: PCI: 00:0a.1 In vt8235_enable 1106 3038. PCI: 00:10.0 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.1 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.2 [1106/3038] enabled In vt8235_enable ffff ffff. Disabling static device: PCI: 00:10.3 In vt8235_enable 1106 3177. Initialising Devices Keyboard init... Keyboard selftest failed ACK: 0xfe PCI: 00:11.0 [1106/3177] enabled In vt8235_enable 1106 0571. PCI: 00:11.1 [1106/0571] enabled In vt8235_enable 1106 3059. PCI: 00:11.5 [1106/3059] enabled In vt8235_enable 1106 3068. PCI: 00:11.6 [1106/3068] disabled In vt8235_enable 1106 3065. PCI: 00:12.0 [1106/3065] enabled PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1106/3122] enabled PCI: pci_scan_bus returning with max=001 vt1211 enabling PNP devices. PNP: 002e.0 enabled vt1211 enabling PNP devices. PNP: 002e.1 enabled vt1211 enabling PNP devices. PNP: 002e.2 enabled vt1211 enabling PNP devices. PNP: 002e.3 enabled vt1211 enabling PNP devices. PNP: 002e.b enabled PCI: pci_scan_bus returning with max=001 done Allocating resources... Reading resources... Done reading resources. Setting resources... I would set ram size to 0x40000 Kbytes PCI: 00:10.0 20 <- [0x0000001800 - 0x000000181f] size 0x00000020 gran 0x05 io PCI: 00:10.1 20 <- [0x0000001820 - 0x000000183f] size 0x00000020 gran 0x05 io PCI: 00:10.2 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq PNP: 002e.1 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq PNP: 002e.b 60 <- [0x000000ec00 - 0x000000ecff] size 0x00000100 gran 0x08 io PCI: 00:11.1 20 <- [0x0000001860 - 0x000000186f] size 0x00000010 gran 0x04 io PCI: 00:11.5 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 00:12.0 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io PCI: 00:12.0 14 <- [0x00febff000 - 0x00febff0ff] size 0x00000100 gran 0x08 mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000f PCI: 00:01.0 cmd <- 07 PCI: 01:00.0 cmd <- 00 PCI: 00:10.0 subsystem <- 00/00 PCI: 00:10.0 cmd <- 01 PCI: 00:10.1 subsystem <- 00/00 PCI: 00:10.1 cmd <- 01 PCI: 00:10.2 subsystem <- 00/00 PCI: 00:10.2 cmd <- 01 PCI: 00:11.0 cmd <- 07 PNP: 002e.0 - enabling PNP: 002e.1 - enabling PNP: 002e.2 - enabling PNP: 002e.3 - enabling PNP: 002e.b - enabling PCI: 00:11.1 cmd <- 81 PCI: 00:11.5 subsystem <- 00/00 PCI: 00:11.5 cmd <- 01 PCI: 00:12.0 cmd <- 83 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor Centaur device 698 CPU: family 06, model 09, stepping 08 WARNING: Using generic cpu ops Enabling cache
Setting fixed MTRRs(0-88) Type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 128MB, type WB Setting variable MTRR 1, base: 128MB, range: 64MB, type WB Setting variable MTRR 2, base: 192MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Disabling local apic...done. CPU #0 Initialized PCI: 00:10.0 init PCI: 00:10.1 init PCI: 00:10.2 init PCI: 00:11.0 init vt8235 init RTC Init Invalid CMOS LB checksum pci_routing_fixup: dev is 000124b8 setting firewire setting usb Assigning IRQ 5 to 0:10.0 Readback = 5 Assigning IRQ 9 to 0:10.1 Readback = 9 Assigning IRQ 9 to 0:10.2 Readback = 9 Assigning IRQ 5 to 0:10.3 Readback = 5 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 9 to 0:11.5 Readback = 9 Assigning IRQ 9 to 0:11.6 Readback = 9 setting ethernet Assigning IRQ 5 to 0:12.0 Readback = 5 setting vga Assigning IRQ 5 to 1:0.0 Readback = 5 setting pci slot setting cardbus slot setting riser slot PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.b init PCI: 00:11.1 init Enabling VIA IDE. ide_init: enabling compatibility IDE addresses enables in reg 0x42 0x9 enables in reg 0x42 read back as 0x9 enables in reg 0x40 0x18 enables in reg 0x40 read back as 0x1b enables in reg 0x9 0x8a enables in reg 0x9 read back as 0x8a command in reg 0x4 0x81 command in reg 0x4 reads back as 0x7 PCI: 00:11.5 init PCI: 00:12.0 init Configuring VIA Rhine LAN PCI: 00:00.0 init VT8623 random fixup ... Frame buffer at d0000000 PCI: 00:01.0 init VT8623 AGP random fixup ... PCI: 01:00.0 init VGA random fixup ... INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 rom base, size: fffc0000 write_protect_vgabios bus/devfn = 0x100 biosint: INT# 0xd biosint: eax 0x5f01 ebx 0x1c898 ecx 0x1bf8c edx 0x1c898 biosint: ebp 0x1bf54 esp 0xfdc edi 0x10088 esi 0x1c898 biosint: ip 0xffff cs 0xf000 flags 0x2 biosint: Oops, exception 13 Stack contents: 0xffff 0xf000 0x0002 0x0088 0xc898 0xbf54 0x0ff2 0xc898 0xc898 0xbf8c 0x5f00 0x6aac 0xc000 0x0046 0xbf8c 0x89c9 0xcc44 0x0000 biosint: Bailing out biosint: INT# 0x10 biosint: eax 0x4f14 ebx 0x18003 ecx 0x1 edx 0x0 biosint: ebp 0x1bf8c esp 0xffa edi 0x10000 esi 0x1c898 biosint: ip 0xc541 cs 0x0 flags 0x46 BIOSINT: Unsupport int #0x10 Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. ACPI: Writing ACPI tables at f0400... ACPI: * FACS ACPI: * DSDT @ 000f04a8 Length 3f0 ACPI: * FADT ACPI: added table 1/8 Length now 40 ACPI: done. Moving GDT to 0x500...ok Multiboot Information structure has been written. Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0cd0 to 0x00100000 Wrote coreboot table at: 00000530 - 00000c18 checksum be6d
elfboot: Attempting to load payload. rom_stream: 0xfffd0000 - 0xfffeffff Uncompressing to RAM 0x01000000 olen = 0x00010500 done. Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 New segment addr 0x7c00 size 0x10400 offset 0x100 filesize 0x10400 (cleaned up) New segment addr 0x7c00 size 0x10400 offset 0x100 filesize 0x10400 Loading Segment: addr: 0x000000000dfcbc00 memsz: 0x0000000000010400 filesz: 0x0000000000010400 Jumping to boot code at 0x7c00 $Revision: 1.163 $ $Date: 2006/07/07 16:10:37 $ Bochs BIOS - build: 06/23/99 $Revision: 1.163 $ $Date: 2006/07/07 16:10:37 $ Options: