Re: [coreboot] [PATCH 7/7] ASUS M2V support (v2): Add m2v mainboard directory and files

[Peter Stuge]

Tobias Diedrich wrote:
> > > /*
> > > * Northbridge pcie bridge 3.3 is not connected to anything, hide it.
> > > */
> > > tmp = pci_cf8_conf1.read8(NULL, 0, PCI_DEVFN(0x0, 5), 0xf0);
> > > tmp&= ~0x10; /* hide pcie bridge 0:3.3 */
> > > tmp&= ~0x40; /* hide scratch register function 0:0.6 */
> > > pci_cf8_conf1.write8(NULL, 0, PCI_DEVFN(0x0, 5), 0xf0, tmp);
> > > /* Enable southbridge bridges 13.0 and 13.1 */
> > > pci_cf8_conf1.write8(NULL, 0, PCI_DEVFN(0x11, 7), 0X4F, 0x43);
> >
> > Hmm this most likely shoudl be done with the help of devicetree.cb
>
> I don't see how this can be done with devicetree.cb.

device pci 3.3 off end
> I think all ranges that have mapped devices and are unavailable for
> PCI bars should be marked as reserved in E820 for correctness.
> Should probably be done in the chipset code and not in the
> mainboard code though.

I agree - and that would be wonderful!

//Peter