3 Jun
2005
3 Jun
'05
8:18 p.m.
On Fri, Jun 03, 2005 at 11:05:14AM -0600, Li-Ta Lo wrote:
On Fri, 2005-06-03 at 10:04 -0700, YhLu wrote:
So you make the romcc to support the real function instead of all inline...?
With cache as ram, we don't need romcc, everything can be compiled by GCC.
The AMD docs don't mention a chip revision - does this mean the trick will work for all Athlon64 and Opterons?
-Kevin