[coreboot] [patch 06/16] Add VT8237A init to vt8237r_early_smbus

[Tobias Diedrich]

Depends on the "Introduce get_vt8237_lpc() function" and
"Use get_vt8237_lpc() in vt8237_sb_enable_fid_vid()" patches.

This adds VT8237A specific VLINK/LPC init in vt8237r_early_smbus.c
I ran some tests and apparently both the

|			/* So the chip knows we are on AMD. */
|			pci_write_config8(devctl, 0x7c, 0x7f);

and

|	/*
|	 * Allow SLP# signal to assert LDTSTOP_L.
|	 * Will work for C3 and for FID/VID change.
|	 */
|	outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);

in vt8237r_early_smbus.c are needed on VT8237A, otherwise I get a (non-fatal)
fid/vid change error on boot.

While vt8237a_vlink_init() in vt8237_ctrl.c is a modified vt8237r_vlink_init(),
vt8237a_init() in vt8237r_lpc.c is a modified vt8237s_init().

Signed-off-by: Tobias Diedrich

---

Index: src/southbridge/via/vt8237r/vt8237r_early_smbus.c
===================================================================
--- src/southbridge/via/vt8237r/vt8237r_early_smbus.c.orig	2010-11-06 22:30:40.000000000 +0100
+++ src/southbridge/via/vt8237r/vt8237r_early_smbus.c	2010-11-06 22:30:41.000000000 +0100
@@ -257,19 +257,30 @@
    	return;

devid = pci_read_config16(dev, PCI_DEVICE_ID);
-	if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
-		devctl = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
-					   PCI_DEVICE_ID_VIA_VT8237_VLINK), 0);

-		if (devctl == PCI_DEV_INVALID)
-			return;
+	/* generic setup */
+
+	/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
+	pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
+
+	/* Enable ACPI accessm RTC signal gated with PSON. */
+	pci_write_config8(dev, 0x81, 0x84);
+
+	/* chipset-specific parts */

-		/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
-		pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
+	/* VLINK: FIXME: can we drop the devid check and just look for the VLINK device? */
+	if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC ||
+	    devid == PCI_DEVICE_ID_VIA_VT8237A_LPC) {
+		devctl = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+					   PCI_DEVICE_ID_VIA_VT8237_VLINK), 0);

-		/* Enable ACPI accessm RTC signal gated with PSON. */
-		pci_write_config8(dev, 0x81, 0x84);
+		if (devctl != PCI_DEV_INVALID) {
+			/* So the chip knows we are on AMD. */
+			pci_write_config8(devctl, 0x7c, 0x7f);
+		}
+	}

+	if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
    	/*
    	 * Allow SLP# signal to assert LDTSTOP_L.
    	 * Will work for C3 and for FID/VID change.
@@ -280,17 +291,10 @@
    	/* Reduce further the STPCLK/LDTSTP signal to 5us. */
    	pci_write_config8(dev, 0xec, 0x4);

-		/* So the chip knows we are on AMD. */
-		pci_write_config8(devctl, 0x7c, 0x7f);
-
    	return;
    }

-	/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
-	pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
-
-	/* Enable ACPI accessm RTC signal gated with PSON. */
-	pci_write_config8(dev, 0x81, 0x84);
+	/* VT8237R and VT8237A */

/*
     * Allow SLP# signal to assert LDTSTOP_L.