On Tue, 15 Jun 2010 10:28:51 -0400, Joseph Smith joe@settoplinux.org wrote:
On Tue, 15 Jun 2010 16:16:46 +0200, Stefan Reinauer
wrote:
On 6/15/10 4:07 PM, Joseph Smith wrote:
When I cold boot it, if I hit the reset button before Linux starts, it
restarts
with coreboot serial console just fine.
Hm...
Maybe 0x2e/0x4e are mapped to LPC after the SuperIO is configured (and that mapping survives a reset)... that would be a southbridge init
issue.
Hmm, This is interesting. The first time I booted it, I had copied
romstage
from another board that had:
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
And I got coreboot serial console (early_serial) just fine but when it
came
to detecting and inializing the superio, I got all kinds of errors from coreboot about device not found.
So I changed it to 0x2e as described in the datasheet and detected with superiotool(vendor bios), and that is when this problem started. But now coreboot is happy, detects the device and the resource allocator is
happy,
I just do not get early_serial on cold boot.
This is weird!
Or, the hardware has to stabilize after power on before you can configure the SuperIO.
Maybe?
Hmm from page 142 in the datasheet, I need to figure out of there is a pull-down resistor connected to the SYSOPT pin to use 0x2e or if there is a pull-up resistor connected to the SYSOPT pin to use 0x4e. And once powered up the configuration port base address can be changed through CR26 and CR27.
I bet you that there is a pull-up resistor connected to the SYSOPT pin and 0x4e is supposed to be used. And the vendor bios changes this to 0x2e at some point. That is what is throwing me off!
So I will try:
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
and change all the devices in devicetree.cb to 4e.
My question is does it need to get changed to 0x2e at some point? Or can I just leave it at 0x4e? Will it matter to OS?
Thanks for all the brainstorming help Stefan and Ron.