Thanks guys to have this board in svn now. It boots ok here. Except for a few problems:
- my processor has only 32 kb of cache reported though it has 512kb
withen booted with proprietiary bios
- only one DIMM is recognized in the motherboard
L2 cache is disabled. Only L1 is there.
Stefan
Is there a way to enable L2 cache.
yes, there is. as i wrote before:
hmm, no. actually x86_enable_cache() just emits a post code, prints some info and calls enable_cache() which is an inline in cache.h which just enables L1 cache by flipping a bit in the processor configuration register 0 (CR0). that's all. it should be renamed to enable_L1_cache() to avoid confusion. the L2 cache can not be enabled in CR0. just take a look at the code and you'll see.
page 7: http://www.cs.inf.ethz.ch/stricker/lab/doc/intel-part4.pdf
line 473ff http://fxr.watson.org/fxr/source/i386/i386/initcpu.c?v=RELENG4
(back after a ulong time..as soon as my linux machine is up+running i'll be back in programming business) Holger