* Jeff Stevens jsteve17@yahoo.com [050318 15:27]:
If there is a good document to help one setup the address map, other than the "AMD BIOS and Kernel Developer's Guide", please let me know.
I'm afraid there is not.
- Does the DRAM map section pertain to the DDR SDRAM,
or is there an ability on the Opteron (as on some other PPC processors I have dealt with) to hang standard DRAM off of the local bus of the processor? If this is for DDR SDRAM, if I leave them all disabled, do these get configured later when the BIOS reads the SPD PROM for the DDR? Or do I have to configure a Window for each processor's maximum allowable DDR SDRAM?
They are supposed to be filled out by the SPDROM setup code of LinuxBIOS. Leave them untouched.
- It seems that the Memory Mapped I/O section is
mainly to map the AMD 8111 and 8131s IO-APIC address ranges (which seem to be 64KB in size). Is this correct, and is there anything else that should go there (maybe PCI space)?
AFAIK this should stay untouched as well to be set up by LinuxBIOS.
- The PCI I/O section is my main problem. I haven't
dealt with PCI too much in depth. I don't understand how it uses only 13 bits for the PCI I/O Base and Limit addresses? I thought that you need a 32-bit address?
It is the upper bit range, so you automatically set these given a certain alignment.
I/O base address is! The only examples in the LinuxBIOS tree have the AMD 8111 & 8131s hanging off of one CPU, and therefor just steer all of the address range to that HT link.
No, have a look at the island/aruma board. It has 8131 hanging off every single CPU.
Stefan