3 Dec
2006
3 Dec
'06
5 a.m.
On 12/2/06, Segher Boessenkool segher@kernel.crashing.org wrote:
- The v1 code seems to read from the highest RAM address for each DRB register.
You need to do this init sequence for every rank of memory. Using each DRB gives you a lot of duplicates, which can be harmless; it can also give you 0 as the top-of-rank address (if the first ranks are empty) which is bad.
no, not really duplicates, I think. You set up the DRBs for max size, you do all the DRAM setup, you size the actual RAM and reprogram the DRBs. This will work even if there is air in the socket. It ensures that a single DRB does not hit the same DRAM bank.
ron