Hi Patrick,
Op dinsdag 17 augustus 2010 10:27:00 schreef u:
are you able to test the S50 with a current coreboot checkout with the RAMBASE option removed?
I tested r5724 without the RAMBASE option and it hangs after the following lines: Stage: loading fallback/coreboot_ram @ 0x100000 (114688 bytes), entry @ 0x100000 lzma: Decoding error = 1 CBFS: LZMA decompression failed! Loading stage failed!
As my old patch doesn`t apply anymore after CAR i tested a similar patch to msrinit.c and it works ok.
On Tuesday 17 August i wrote:
I think you were right that it should be part of the chipset code. After the question (hint?) from Stephan :"Why 1F6BF000 ?" ,i was not sure anymore if the static address was the right thing to do or that it would be necessary/better to calculate the address based on the amount of dram in the system.
I have no time at the moment to investigate this more. It`s still on my to do list.
Thanks,Nils.