On 01.07.2019 14:53, Andriy Gapon wrote:
I am using a PCEngines APU2 system and I noticed that its HPET timers do not advertise FSB (MSI) interrupt delivery capability.
Any logs pointing to the statement?
That is despite the fact that BKDG for family 16h models 30h - 3Fh says that those capability bits are hardwired to 1. I took a quick look through coreboot sources (APU2 firmware is coreboot) and noticed something interesting. It seems that the repository includes code for AGESA (src/vendorcode/amd/agesa) and there I see that the MSI capability can be turned on / off via a special PM I/O register. It appears that HPET MSI support is disabled on some platforms by default:
src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c: TRUE, // HpetMsiDis src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Family/Yangtze/EnvDefYangtze.c: TRUE, // HpetMsiDis
Does anyone know what is a reason for that? Are there any hardware errata related to that feature? I think that MSI delivery is more efficient and "sexy" than the traditional delivery via IO-APIC (although everything is integrated).
Also, is there a way to override that default in a mainboard configuration?
In the BIosCallOuts.c for the platform You could try explicitly set the HpetMsiDis to FALSE. In function Fch_Oem_config in the AMD_INIT_ENV try to add:
FchParams->Hpet.HpetEnable = TRUE; FchParams->Hpet.HpetMsiDis = FALSE;
Maybe it will change anything. Regarding the reasons, it may not be any particular reason. PC Engines apu2 is initialized with AGESA binary blob not built from source code, so the code is not fully auditable. It is likely that the AGESA is not initializing the MSI for HPET. Neither it is documented in BKDG.
Thank you.