What is the transfer rate and latency of the interface between the CPU and the BIOS socket in motherboards like Via Epia or Tyan Opteron boards?
What I am thinking to do is to put very fast SRAM there (it should work, shouldn't it?), battery backed up of course, and run the LinuxBIOS and kernel XiP eXecute in Place (without copying to RAM). Would that work? Imagine I could put 8 MB of fast SRAM there.
Now, would that make sense, is the interface as fast as the FSB if I have a 200 MHz FSB for example?
If I put some SRAM with random access time below 5 ns in there would it communicate with the CPU faster than DRAM in hte DIMM sockets is? Or at least as fast? With the intention of running it XiP.