Hi All, I feel I am going around in circles with this problem. The task at hand is to be able to upgrade coreboot/uefi image in a winbond W25Q64 flash chip from linux. This chip is connected to the PCU SPI interface on the Intel e3805 processor. I know coreboot is writing to this chip without problem from the log:
SF: Got idcode: ef 60 17 00 00 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000 Need to erase the MRC cache region of 65536 bytes at ffd10000 SF: erase 20 51 0 0 (511000) SPI: read 0080 from 0090 SPI: wrote 000c to 0090 SPI: wrote 06 to 0098
However linux is not detecting the flash device or the PCH SPI controller. Disassembling the dsdt table I can see e3800 soc devices such as the HPET and PIC but no PCH SPI. The only SPI device is part of the SIO:
Device (SPI1) { Name (_HID, "80860F0E" /* Intel SPI Controller */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_DDN, "SPI Controller #2") // _DDN: DOS Device Name
My question is does coreboot need to include the PCU SPI controller in the acpi tables and if so how do I do that?
The platform is a custom design but very similar to the Intel Minnow Turbot board.
Many thanks, Graham Perkins.
Vocality | Cubic Mission Solutions Graham Perkins Senior Software Engineer, Vocality | Cubic Mission Solutions T: +44 1483 813 120 x154 E: graham.perkins@vocality.com | W: www.vocality.com A: Lydling Barns, Lydling Farm, Puttenham Lane, Shackleford, Surrey, GU8 6AP
